Fix some typo and brain twister logical.

gcc/
	* config/mips/mips.c: Fix typo in documentation of
	mips_loongson_ext2_prefetch_cookie.
	(mips_option_override): fix brain twister logical.
	* config/mips/mips.h: Fix typo in documentation of
	ISA_HAS_CTZ_CTO and define pattern.
	* config/mips/mips.md (prefetch): Hoist EXT2 above
	the 2EF/EXT block.
	(prefetch_indexed): Hoist EXT2 above the EXT block.

gcc/testsuite/
	* gcc.target/mips/loongson-ctz.c: Fix typo.
	* gcc.target/mips/loongson-dctz.c: Fix typo.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@265871 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c0aae3a866b9c91ffd8fa0d09afd01a415c76a91..d2e167b5ca27393bc1b1d9b7872c9f8ac068ee25 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2018-11-07  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * config/mips/mips.c: Fix typo in documentation of
+       mips_loongson_ext2_prefetch_cookie.
+       (mips_option_override): fix brain twister logical.
+       * config/mips/mips.h: Fix typo in documentation of
+       ISA_HAS_CTZ_CTO and define pattern.
+       * config/mips/mips.md (prefetch): Hoist EXT2 above
+       the 2EF/EXT block.
+       (prefetch_indexed): Hoist EXT2 above the EXT block.
+
 2018-11-07  Jan Hubicka  <jh@suse.cz>
 
        * tree.c (free_lang_data_in_type): Add fld parameter; simplify

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 2b83e4ec679cf64dec92082c30f77a7708fa3dc8..d78e2056ec2b2f833b3e6f27372af083a5d101ee 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -15151,7 +15151,7 @@ mips_prefetch_cookie (rtx write, rtx locality)
   return GEN_INT (INTVAL (write) + 6);
 }
 
-/* Loongson EXT2 only implements perf hint=0 (prefetch for load) and hint=1
+/* Loongson EXT2 only implements pref hint=0 (prefetch for load) and hint=1
    (prefetch for store), other hint just scale to hint = 0 and hint = 1.  */
 
 rtx
@@ -20202,7 +20202,7 @@ mips_option_override (void)
         is true.  If a user explicitly says -mloongson-ext2 -mno-loongson-ext
         then that is an error.  */
       if (!TARGET_LOONGSON_EXT
-         && !((target_flags_explicit & MASK_LOONGSON_EXT) == 0))
+         && (target_flags_explicit & MASK_LOONGSON_EXT) != 0)
        error ("%<-mloongson-ext2%> must be used with %<-mloongson-ext%>");
       target_flags |= MASK_LOONGSON_EXT;
     }

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 0a92cf6788af569361165c177c2522979c69f8e0..11ca364d752293b1b45443b6cd6712620c4e4183 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1158,7 +1158,7 @@ struct mips_cpu_info {
 /* ISA has count leading zeroes/ones instruction (not implemented).  */
 #define ISA_HAS_CLZ_CLO                (mips_isa_rev >= 1 && !TARGET_MIPS16)
 
-/* ISA has count tailing zeroes/ones instruction.  */
+/* ISA has count trailing zeroes/ones instruction.  */
 #define ISA_HAS_CTZ_CTO                (TARGET_LOONGSON_EXT2)
 
 /* ISA has three operand multiply instructions that put

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 9e222dc0df0eef87c2492ce53614d17e19b69872..0cb0cb80bcd5a995106684aee4c71c9ea804c95e 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -3153,7 +3153,7 @@
 ;;
 ;;  ...................
 ;;
-;;  Count tailing zeroes.
+;;  Count trailing zeroes.
 ;;
 ;;  ...................
 ;;
@@ -7157,21 +7157,21 @@
             (match_operand 2 "const_int_operand" "n"))]
   "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS"
 {
-  if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || TARGET_LOONGSON_EXT2)
+  if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT)
     {
-      /* Loongson ext2 implementation pref insnstructions.  */
-      if (TARGET_LOONGSON_EXT2)
-       {
-         operands[1] = mips_loongson_ext2_prefetch_cookie (operands[1],
-                                                           operands[2]);
-         return "pref\t%1, %a0";
-       }
       /* Loongson 2[ef] and Loongson ext use load to $0 for prefetching.  */
       if (TARGET_64BIT)
        return "ld\t$0,%a0";
       else
        return "lw\t$0,%a0";
     }
+  /* Loongson ext2 implementation pref instructions.  */
+  if (TARGET_LOONGSON_EXT2)
+    {
+      operands[1] = mips_loongson_ext2_prefetch_cookie (operands[1],
+                                                       operands[2]);
+      return "pref\t%1, %a0";
+    }
   operands[1] = mips_prefetch_cookie (operands[1], operands[2]);
   return "pref\t%1,%a0";
 }
@@ -7184,21 +7184,21 @@
             (match_operand 3 "const_int_operand" "n"))]
   "ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
 {
-  if (TARGET_LOONGSON_EXT || TARGET_LOONGSON_EXT2)
+  if (TARGET_LOONGSON_EXT)
     {
-      /* Loongson ext2 implementation pref insnstructions.  */
-      if (TARGET_LOONGSON_EXT2)
-       {
-         operands[2] = mips_loongson_ext2_prefetch_cookie (operands[2],
-                                                           operands[3]);
-         return "prefx\t%2,%1(%0)";
-       }
       /* Loongson Loongson ext use index load to $0 for prefetching.  */
       if (TARGET_64BIT)
        return "gsldx\t$0,0(%0,%1)";
       else
        return "gslwx\t$0,0(%0,%1)";
     }
+  /* Loongson ext2 implementation pref instructions.  */
+  if (TARGET_LOONGSON_EXT2)
+    {
+      operands[2] = mips_loongson_ext2_prefetch_cookie (operands[2],
+                                                       operands[3]);
+      return "prefx\t%2,%1(%0)";
+    }
   operands[2] = mips_prefetch_cookie (operands[2], operands[3]);
   return "prefx\t%2,%1(%0)";
 }

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 65c1cf1efec1cfd9e23c5c7078593ab5e818b462..79e0fa3e3c9b6dfa1c65aa1670ba3edada942197 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-11-07  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * gcc.target/mips/loongson-ctz.c: Fix typo.
+       * gcc.target/mips/loongson-dctz.c: Fix typo.
+
 2018-11-07  Jan Hubicka  <jh@suse.cz>
 
        * g++.dg/lto/odr-1_1.C: Fix template.

diff --git a/gcc/testsuite/gcc.target/mips/loongson-ctz.c b/gcc/testsuite/gcc.target/mips/loongson-ctz.c
index 8df66a00dc1a4b96bc5fb6121101b7d061eef982..7238fe2f281e56cafb71a28a5b75c2343c229114 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/loongson-ctz.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-ctz.c
@@ -1,4 +1,4 @@
-/* Test cases for Loongson EXT2 instrutions.  */
+/* Test cases for Loongson EXT2 instructions.  */
 
 /* { dg-do compile } */
 /* { dg-options "-mloongson-ext2" } */

diff --git a/gcc/testsuite/gcc.target/mips/loongson-dctz.c b/gcc/testsuite/gcc.target/mips/loongson-dctz.c
index 8c47433459f2cb2be71dd2a69041cbb3f1d7bcdd..f0c42f8a0698c35a5eae551b9a08cf6a43f02477 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/loongson-dctz.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-dctz.c
@@ -1,4 +1,4 @@
-/* Test cases for Loongson EXT2 instrutions.  */
+/* Test cases for Loongson EXT2 instructions.  */
 
 /* { dg-do compile } */
 /* { dg-options "-mloongson-ext2" } */