drop arm-dts-ls1021a-specify-tbipa-register-address.patch

diff --git a/queue-4.14/arm-dts-ls1021a-specify-tbipa-register-address.patch b/queue-4.14/arm-dts-ls1021a-specify-tbipa-register-address.patch
deleted file mode 100644 (file)
index daece7c..0000000
--- a/queue-4.14/arm-dts-ls1021a-specify-tbipa-register-address.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From foo@baz Sun May 27 16:52:54 CEST 2018
-From: Esben Haabendal <eha@deif.com>
-Date: Fri, 6 Apr 2018 14:46:35 +0200
-Subject: ARM: dts: ls1021a: Specify TBIPA register address
-
-From: Esben Haabendal <eha@deif.com>
-
-[ Upstream commit 5571196135abb6d51e01592812997403c136067c ]
-
-The current (mildly evil) fsl_pq_mdio code uses an undocumented shadow of
-the TBIPA register on LS1021A, which happens to be read-only.
-Changing TBI PHY address therefore does not work on LS1021A.
-
-The real (and documented) address of the TBIPA registere lies in the eTSEC
-block and not in MDIO/MII, which is read/write, so using that fixes
-the problem.
-
-Signed-off-by: Esben Haabendal <eha@deif.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/arm/boot/dts/ls1021a.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -565,7 +565,8 @@
-                       device_type = "mdio";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
--                      reg = <0x0 0x2d24000 0x0 0x4000>;
-+                      reg = <0x0 0x2d24000 0x0 0x4000>,
-+                            <0x0 0x2d10030 0x0 0x4>;
-               };
- 
-               ptp_clock@2d10e00 {

diff --git a/queue-4.14/series b/queue-4.14/series
index 7990188e89f1d1547c61d06086303e83335ac461..2c7620f5188269a7c4b5522df6be089b89ca8b3b 100644 (file)
--- a/queue-4.14/series
+++ b/queue-4.14/series
@@ -331,7 +331,6 @@ powerpc-fscr-enable-interrupts-earlier-before-calling-get_user.patch
 perf-tools-fix-perf-builds-with-clang-support.patch
 perf-clang-add-support-for-recent-clang-versions.patch
 dp83640-ensure-against-premature-access-to-phy-registers-after-reset.patch
-arm-dts-ls1021a-specify-tbipa-register-address.patch
 ibmvnic-zero-used-tx-descriptor-counter-on-reset.patch
 mm-ksm-fix-interaction-with-thp.patch
 mm-fix-races-between-address_space-dereference-and-free-in-page_evicatable.patch

diff --git a/queue-4.16/arm-dts-ls1021a-specify-tbipa-register-address.patch b/queue-4.16/arm-dts-ls1021a-specify-tbipa-register-address.patch
deleted file mode 100644 (file)
index 000113d..0000000
--- a/queue-4.16/arm-dts-ls1021a-specify-tbipa-register-address.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From foo@baz Sun May 27 16:10:02 CEST 2018
-From: Esben Haabendal <eha@deif.com>
-Date: Fri, 6 Apr 2018 14:46:35 +0200
-Subject: ARM: dts: ls1021a: Specify TBIPA register address
-
-From: Esben Haabendal <eha@deif.com>
-
-[ Upstream commit 5571196135abb6d51e01592812997403c136067c ]
-
-The current (mildly evil) fsl_pq_mdio code uses an undocumented shadow of
-the TBIPA register on LS1021A, which happens to be read-only.
-Changing TBI PHY address therefore does not work on LS1021A.
-
-The real (and documented) address of the TBIPA registere lies in the eTSEC
-block and not in MDIO/MII, which is read/write, so using that fixes
-the problem.
-
-Signed-off-by: Esben Haabendal <eha@deif.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/arm/boot/dts/ls1021a.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -587,7 +587,8 @@
-                       device_type = "mdio";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
--                      reg = <0x0 0x2d24000 0x0 0x4000>;
-+                      reg = <0x0 0x2d24000 0x0 0x4000>,
-+                            <0x0 0x2d10030 0x0 0x4>;
-               };
- 
-               ptp_clock@2d10e00 {

diff --git a/queue-4.16/series b/queue-4.16/series
index a326b464bddaed8b16dce69306748c1176473392..f878fbf37b520de7c25f32c3f538532eca51f665 100644 (file)
--- a/queue-4.16/series
+++ b/queue-4.16/series
@@ -63,7 +63,6 @@ powerpc-fscr-enable-interrupts-earlier-before-calling-get_user.patch
 perf-tools-fix-perf-builds-with-clang-support.patch
 perf-clang-add-support-for-recent-clang-versions.patch
 dp83640-ensure-against-premature-access-to-phy-registers-after-reset.patch
-arm-dts-ls1021a-specify-tbipa-register-address.patch
 ibmvnic-zero-used-tx-descriptor-counter-on-reset.patch
 genirq-affinity-don-t-return-with-empty-affinity-masks-on-error.patch
 mm-ksm-fix-interaction-with-thp.patch

diff --git a/queue-4.4/arm-dts-ls1021a-specify-tbipa-register-address.patch b/queue-4.4/arm-dts-ls1021a-specify-tbipa-register-address.patch
deleted file mode 100644 (file)
index 76b2f33..0000000
--- a/queue-4.4/arm-dts-ls1021a-specify-tbipa-register-address.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From foo@baz Sun May 27 17:52:22 CEST 2018
-From: Esben Haabendal <eha@deif.com>
-Date: Fri, 6 Apr 2018 14:46:35 +0200
-Subject: ARM: dts: ls1021a: Specify TBIPA register address
-
-From: Esben Haabendal <eha@deif.com>
-
-[ Upstream commit 5571196135abb6d51e01592812997403c136067c ]
-
-The current (mildly evil) fsl_pq_mdio code uses an undocumented shadow of
-the TBIPA register on LS1021A, which happens to be read-only.
-Changing TBI PHY address therefore does not work on LS1021A.
-
-The real (and documented) address of the TBIPA registere lies in the eTSEC
-block and not in MDIO/MII, which is read/write, so using that fixes
-the problem.
-
-Signed-off-by: Esben Haabendal <eha@deif.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/arm/boot/dts/ls1021a.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -433,7 +433,8 @@
-                       device_type = "mdio";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
--                      reg = <0x0 0x2d24000 0x0 0x4000>;
-+                      reg = <0x0 0x2d24000 0x0 0x4000>,
-+                            <0x0 0x2d10030 0x0 0x4>;
-               };
- 
-               enet0: ethernet@2d10000 {

diff --git a/queue-4.4/series b/queue-4.4/series
index 71a54186026179cbcdf0db2c6a4b43fe152503d7..a423319621610c466551537daa33fe90391f1702 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -164,7 +164,6 @@ force-log-to-disk-before-reading-the-agf-during-a-fstrim.patch
 cpufreq-cppc-initialize-shared-perf-capabilities-of-cpus.patch
 scsi-aacraid-insure-command-thread-is-not-recursively-stopped.patch
 dp83640-ensure-against-premature-access-to-phy-registers-after-reset.patch
-arm-dts-ls1021a-specify-tbipa-register-address.patch
 mm-ksm-fix-interaction-with-thp.patch
 mm-fix-races-between-address_space-dereference-and-free-in-page_evicatable.patch
 btrfs-bail-out-on-error-during-replay_dir_deletes.patch

diff --git a/queue-4.9/arm-dts-ls1021a-specify-tbipa-register-address.patch b/queue-4.9/arm-dts-ls1021a-specify-tbipa-register-address.patch
deleted file mode 100644 (file)
index 0ce9ff4..0000000
--- a/queue-4.9/arm-dts-ls1021a-specify-tbipa-register-address.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From foo@baz Sun May 27 17:33:38 CEST 2018
-From: Esben Haabendal <eha@deif.com>
-Date: Fri, 6 Apr 2018 14:46:35 +0200
-Subject: ARM: dts: ls1021a: Specify TBIPA register address
-
-From: Esben Haabendal <eha@deif.com>
-
-[ Upstream commit 5571196135abb6d51e01592812997403c136067c ]
-
-The current (mildly evil) fsl_pq_mdio code uses an undocumented shadow of
-the TBIPA register on LS1021A, which happens to be read-only.
-Changing TBI PHY address therefore does not work on LS1021A.
-
-The real (and documented) address of the TBIPA registere lies in the eTSEC
-block and not in MDIO/MII, which is read/write, so using that fixes
-the problem.
-
-Signed-off-by: Esben Haabendal <eha@deif.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/arm/boot/dts/ls1021a.dtsi |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -509,7 +509,8 @@
-                       device_type = "mdio";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
--                      reg = <0x0 0x2d24000 0x0 0x4000>;
-+                      reg = <0x0 0x2d24000 0x0 0x4000>,
-+                            <0x0 0x2d10030 0x0 0x4>;
-               };
- 
-               ptp_clock@2d10e00 {

diff --git a/queue-4.9/series b/queue-4.9/series
index f35610aace7607624530d2ec36ce331ac2d938de..3aaf4b658a8614a48af7731c38f3775049f33b75 100644 (file)
--- a/queue-4.9/series
+++ b/queue-4.9/series
@@ -235,7 +235,6 @@ sr-get-drop-reference-to-device-in-revalidate-and-check_events.patch
 force-log-to-disk-before-reading-the-agf-during-a-fstrim.patch
 cpufreq-cppc-initialize-shared-perf-capabilities-of-cpus.patch
 dp83640-ensure-against-premature-access-to-phy-registers-after-reset.patch
-arm-dts-ls1021a-specify-tbipa-register-address.patch
 mm-ksm-fix-interaction-with-thp.patch
 mm-fix-races-between-address_space-dereference-and-free-in-page_evicatable.patch
 btrfs-bail-out-on-error-during-replay_dir_deletes.patch