]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/xe/display: Add intel_plane_initial_vblank_wait
authorMaarten Lankhorst <dev@lankhorst.se>
Tue, 21 Jan 2025 14:28:48 +0000 (15:28 +0100)
committerMaarten Lankhorst <dev@lankhorst.se>
Fri, 31 Jan 2025 08:42:17 +0000 (09:42 +0100)
We're changing the driver to have no interrupts during early init for
Xe, so we poll the PIPE_FRMSTMSMP counter instead.

Interrupts cannot be enabled during FB readout because memirq's requires
an allocation. This would overwrite the FB we want to read out.

While it might be possible to also run do the same in i915 and run
it without interrupts, the platforms i915 supports had a less clear
distinction between display and graphics. For this reason I choose
only to touch Xe for now.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250121142850.4960-1-dev@lankhorst.se
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_plane_initial.c
drivers/gpu/drm/i915/display/intel_plane_initial.h
drivers/gpu/drm/xe/display/xe_plane_initial.c

index 4271da219b4105630106a2bc7e1fa42015ede1e1..6f6a535ea486479cca9deb4824db7a207f03897f 100644 (file)
@@ -796,7 +796,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
        if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
            hsw_ips_disable(crtc_state)) {
                crtc_state->ips_enabled = false;
-               intel_crtc_wait_for_next_vblank(crtc);
+               intel_plane_initial_vblank_wait(crtc);
        }
 
        /*
@@ -810,7 +810,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
         */
        if (HAS_GMCH(dev_priv) &&
            intel_set_memory_cxsr(dev_priv, false))
-               intel_crtc_wait_for_next_vblank(crtc);
+               intel_plane_initial_vblank_wait(crtc);
 
        /*
         * Gen2 reports pipe underruns whenever all planes are disabled.
@@ -820,7 +820,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
                intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);
 
        intel_plane_disable_arm(NULL, plane, crtc_state);
-       intel_crtc_wait_for_next_vblank(crtc);
+       intel_plane_initial_vblank_wait(crtc);
 }
 
 unsigned int
index 6789b7f14095293fe16b51862b51c3e339b08a26..b1675b46e06cb049dd6a5bd99af3682441795286 100644 (file)
 #include "intel_frontbuffer.h"
 #include "intel_plane_initial.h"
 
+void intel_plane_initial_vblank_wait(struct intel_crtc *crtc)
+{
+       intel_crtc_wait_for_next_vblank(crtc);
+}
+
 static bool
 intel_reuse_initial_plane_obj(struct intel_crtc *this,
                              const struct intel_initial_plane_config plane_configs[],
@@ -442,7 +447,7 @@ void intel_initial_plane_config(struct intel_display *display)
                intel_find_initial_plane_obj(crtc, plane_configs);
 
                if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))
-                       intel_crtc_wait_for_next_vblank(crtc);
+                       intel_plane_initial_vblank_wait(crtc);
 
                plane_config_fini(plane_config);
        }
index 6c6aa717ed21f0d29bc153652869b6e4dcd164a7..5c315acda2101cbb3a56f77531c6f9cb81d125ae 100644 (file)
@@ -6,8 +6,10 @@
 #ifndef __INTEL_PLANE_INITIAL_H__
 #define __INTEL_PLANE_INITIAL_H__
 
+struct intel_crtc;
 struct intel_display;
 
 void intel_initial_plane_config(struct intel_display *display);
+void intel_plane_initial_vblank_wait(struct intel_crtc *crtc);
 
 #endif
index 2eb9633f163a764562c84f29b0e216041b348382..a22e7adfb09d9b865e08b3d75fa7b71cbf81f4be 100644 (file)
@@ -8,7 +8,9 @@
 
 #include "regs/xe_gtt_defs.h"
 #include "xe_ggtt.h"
+#include "xe_mmio.h"
 
+#include "i915_reg.h"
 #include "intel_atomic_plane.h"
 #include "intel_crtc.h"
 #include "intel_display.h"
 
 #include <generated/xe_wa_oob.h>
 
+void intel_plane_initial_vblank_wait(struct intel_crtc *crtc)
+{
+       /* Early xe has no irq */
+       struct xe_device *xe = to_xe_device(crtc->base.dev);
+       struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));
+       u32 timestamp;
+       int ret;
+
+       timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp);
+
+       ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, &timestamp, false);
+       if (ret < 0)
+               drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret);
+}
+
 static bool
 intel_reuse_initial_plane_obj(struct intel_crtc *this,
                              const struct intel_initial_plane_config plane_configs[],
@@ -303,7 +320,7 @@ void intel_initial_plane_config(struct intel_display *display)
                intel_find_initial_plane_obj(crtc, plane_configs);
 
                if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))
-                       intel_crtc_wait_for_next_vblank(crtc);
+                       intel_plane_initial_vblank_wait(crtc);
 
                plane_config_fini(plane_config);
        }