mach-k3: j722s: enable caches for the SPL stage

This is same as done in commit 27cd65ca1bf1 ("mach-k3: am62ax: enable
caches for the SPL stage").

This is resulting in ~2x speedup in the A53 SPL stage.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>

diff --git a/arch/arm/mach-k3/j722s/j722s_init.c b/arch/arm/mach-k3/j722s/j722s_init.c
index d8123f282ee8d044f031c99f8bc924b98ff6e6f8..1180c75f551dd1ee264529e8661ab5d8c8cbfb43 100644 (file)
--- a/arch/arm/mach-k3/j722s/j722s_init.c
+++ b/arch/arm/mach-k3/j722s/j722s_init.c
@@ -166,6 +166,8 @@ static void k3_mem_init(void)
                if (ret)
                        panic("DRAM init failed: %d\n", ret);
        }
+
+       spl_enable_cache();
 }
 
 static __maybe_unused void enable_mcu_esm_reset(void)