]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.19-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Jul 2019 07:58:00 +0000 (16:58 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Jul 2019 07:58:00 +0000 (16:58 +0900)
added patches:
regmap-irq-do-not-write-mask-register-if-mask_base-is-zero.patch

queue-4.19/regmap-irq-do-not-write-mask-register-if-mask_base-is-zero.patch [new file with mode: 0644]
queue-4.19/series

diff --git a/queue-4.19/regmap-irq-do-not-write-mask-register-if-mask_base-is-zero.patch b/queue-4.19/regmap-irq-do-not-write-mask-register-if-mask_base-is-zero.patch
new file mode 100644 (file)
index 0000000..7c26ed7
--- /dev/null
@@ -0,0 +1,45 @@
+From 7151449fe7fa5962c6153355f9779d6be99e8e97 Mon Sep 17 00:00:00 2001
+From: Mark Zhang <markz@nvidia.com>
+Date: Mon, 14 Jan 2019 17:32:58 +0800
+Subject: regmap-irq: do not write mask register if mask_base is zero
+
+From: Mark Zhang <markz@nvidia.com>
+
+commit 7151449fe7fa5962c6153355f9779d6be99e8e97 upstream.
+
+If client have not provided the mask base register then do not
+write into the mask register.
+
+Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
+Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
+Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
+Signed-off-by: Mark Zhang <markz@nvidia.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/base/regmap/regmap-irq.c |    6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/base/regmap/regmap-irq.c
++++ b/drivers/base/regmap/regmap-irq.c
+@@ -91,6 +91,9 @@ static void regmap_irq_sync_unlock(struc
+        * suppress pointless writes.
+        */
+       for (i = 0; i < d->chip->num_regs; i++) {
++              if (!d->chip->mask_base)
++                      continue;
++
+               reg = d->chip->mask_base +
+                       (i * map->reg_stride * d->irq_reg_stride);
+               if (d->chip->mask_invert) {
+@@ -526,6 +529,9 @@ int regmap_add_irq_chip(struct regmap *m
+       /* Mask all the interrupts by default */
+       for (i = 0; i < chip->num_regs; i++) {
+               d->mask_buf[i] = d->mask_buf_def[i];
++              if (!chip->mask_base)
++                      continue;
++
+               reg = chip->mask_base +
+                       (i * map->reg_stride * d->irq_reg_stride);
+               if (chip->mask_invert)
index 40daaf8e1c9047df14dc456e80eb9479a40c869c..a06f55399d9a371db9559712b8c67ace6bf365ed 100644 (file)
@@ -40,3 +40,4 @@ s390-qdio-don-t-touch-the-dsci-in-tiqdio_add_input_queues.patch
 crypto-talitos-move-struct-talitos_edesc-into-talitos.h.patch
 crypto-talitos-fix-hash-on-sec1.patch
 crypto-nx-set-receive-window-credits-to-max-number-of-crbs-in-rxfifo.patch
+regmap-irq-do-not-write-mask-register-if-mask_base-is-zero.patch