arm, objdump: print obsolote warning when 26-bit set in instructions

Arm has obsoleted the 26-bit addressing mode. Diagnose this when disasembling
these instructions by printing OBSOLETE.

diff --git a/gas/testsuite/gas/arm/armv1.d b/gas/testsuite/gas/arm/armv1.d
index 3ae310a2fb777598a3402c58b3af990c2d78dc3b..1e0df1e999d1c84f3b1df4d082c1fc23e9b50926 100644 (file)
--- a/gas/testsuite/gas/arm/armv1.d
+++ b/gas/testsuite/gas/arm/armv1.d
@@ -30,16 +30,16 @@ Disassembly of section .text:
 0+4c <[^>]*> e1d00000 ?        bics    r0, r0, r0
 0+50 <[^>]*> e1100000 ?        tst     r0, r0
 0+54 <[^>]*> e1100000 ?        tst     r0, r0
-0+58 <[^>]*> e110f000 ?        tstp    r0, r0
+0+58 <[^>]*> e110f000 ?        tstp    r0, r0  @ p-variant is OBSOLETE
 0+5c <[^>]*> e1300000 ?        teq     r0, r0
 0+60 <[^>]*> e1300000 ?        teq     r0, r0
-0+64 <[^>]*> e130f000 ?        teqp    r0, r0
+0+64 <[^>]*> e130f000 ?        teqp    r0, r0  @ p-variant is OBSOLETE
 0+68 <[^>]*> e1500000 ?        cmp     r0, r0
 0+6c <[^>]*> e1500000 ?        cmp     r0, r0
-0+70 <[^>]*> e150f000 ?        cmpp    r0, r0
+0+70 <[^>]*> e150f000 ?        cmpp    r0, r0  @ p-variant is OBSOLETE
 0+74 <[^>]*> e1700000 ?        cmn     r0, r0
 0+78 <[^>]*> e1700000 ?        cmn     r0, r0
-0+7c <[^>]*> e170f000 ?        cmnp    r0, r0
+0+7c <[^>]*> e170f000 ?        cmnp    r0, r0  @ p-variant is OBSOLETE
 0+80 <[^>]*> e1a00000 ?        nop[\s]+@ \(mov r0, r0\)
 0+84 <[^>]*> e1b00000 ?        movs    r0, r0
 0+88 <[^>]*> e1e00000 ?        mvn     r0, r0

diff --git a/gas/testsuite/gas/arm/inst.d b/gas/testsuite/gas/arm/inst.d
index 3fda9465193398695a37ffa146487ab6db7f6e71..78f4958d6ebf9c517cfa9d747cfa062d7e1f2119 100644 (file)
--- a/gas/testsuite/gas/arm/inst.d
+++ b/gas/testsuite/gas/arm/inst.d
@@ -95,22 +95,22 @@ Disassembly of section .text:
 0+14c <[^>]*> e1720004 ?       cmn     r2, r4
 0+150 <[^>]*> e1750287 ?       cmn     r5, r7, lsl #5
 0+154 <[^>]*> e1710113 ?       cmn     r1, r3, lsl r1
-0+158 <[^>]*> e330f00a ?       teqp    r0, #10
-0+15c <[^>]*> e132f004 ?       teqp    r2, r4
-0+160 <[^>]*> e135f287 ?       teqp    r5, r7, lsl #5
-0+164 <[^>]*> e131f113 ?       teqp    r1, r3, lsl r1
-0+168 <[^>]*> e370f00a ?       cmnp    r0, #10
-0+16c <[^>]*> e172f004 ?       cmnp    r2, r4
-0+170 <[^>]*> e175f287 ?       cmnp    r5, r7, lsl #5
-0+174 <[^>]*> e171f113 ?       cmnp    r1, r3, lsl r1
-0+178 <[^>]*> e350f00a ?       cmpp    r0, #10
-0+17c <[^>]*> e152f004 ?       cmpp    r2, r4
-0+180 <[^>]*> e155f287 ?       cmpp    r5, r7, lsl #5
-0+184 <[^>]*> e151f113 ?       cmpp    r1, r3, lsl r1
-0+188 <[^>]*> e310f00a ?       tstp    r0, #10
-0+18c <[^>]*> e112f004 ?       tstp    r2, r4
-0+190 <[^>]*> e115f287 ?       tstp    r5, r7, lsl #5
-0+194 <[^>]*> e111f113 ?       tstp    r1, r3, lsl r1
+0+158 <[^>]*> e330f00a ?       teqp    r0, #10 @ p-variant is OBSOLETE
+0+15c <[^>]*> e132f004 ?       teqp    r2, r4  @ p-variant is OBSOLETE
+0+160 <[^>]*> e135f287 ?       teqp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+164 <[^>]*> e131f113 ?       teqp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+168 <[^>]*> e370f00a ?       cmnp    r0, #10 @ p-variant is OBSOLETE
+0+16c <[^>]*> e172f004 ?       cmnp    r2, r4  @ p-variant is OBSOLETE
+0+170 <[^>]*> e175f287 ?       cmnp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+174 <[^>]*> e171f113 ?       cmnp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+178 <[^>]*> e350f00a ?       cmpp    r0, #10 @ p-variant is OBSOLETE
+0+17c <[^>]*> e152f004 ?       cmpp    r2, r4  @ p-variant is OBSOLETE
+0+180 <[^>]*> e155f287 ?       cmpp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+184 <[^>]*> e151f113 ?       cmpp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+188 <[^>]*> e310f00a ?       tstp    r0, #10 @ p-variant is OBSOLETE
+0+18c <[^>]*> e112f004 ?       tstp    r2, r4  @ p-variant is OBSOLETE
+0+190 <[^>]*> e115f287 ?       tstp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+194 <[^>]*> e111f113 ?       tstp    r1, r3, lsl r1  @ p-variant is OBSOLETE
 0+198 <[^>]*> e0000291 ?       mul     r0, r1, r2
 0+19c <[^>]*> e0110392 ?       muls    r1, r2, r3
 0+1a0 <[^>]*> 10000091 ?       mulne   r0, r1, r0

diff --git a/gas/testsuite/gas/arm/pinsn.d b/gas/testsuite/gas/arm/pinsn.d
deleted file mode 100644 (file)
index 792843e..0000000
--- a/gas/testsuite/gas/arm/pinsn.d
+++ /dev/null
@@ -1,24 +0,0 @@
-# name: 26-bit teq/cmn/tst/cmp instructions
-# objdump: -dr --prefix-addresses --show-raw-insn -marmv4
-# skip: *-*-pe *-*-wince
-
-.*: +file format .*arm.*
-
-
-Disassembly of section .text:
-0+000 <[^>]*> e330f00a ?       teqp    r0, #10
-0+004 <[^>]*> e132f004 ?       teqp    r2, r4
-0+008 <[^>]*> e135f287 ?       teqp    r5, r7, lsl #5
-0+00c <[^>]*> e131f113 ?       teqp    r1, r3, lsl r1
-0+010 <[^>]*> e370f00a ?       cmnp    r0, #10
-0+014 <[^>]*> e172f004 ?       cmnp    r2, r4
-0+018 <[^>]*> e175f287 ?       cmnp    r5, r7, lsl #5
-0+01c <[^>]*> e171f113 ?       cmnp    r1, r3, lsl r1
-0+020 <[^>]*> e350f00a ?       cmpp    r0, #10
-0+024 <[^>]*> e152f004 ?       cmpp    r2, r4
-0+028 <[^>]*> e155f287 ?       cmpp    r5, r7, lsl #5
-0+02c <[^>]*> e151f113 ?       cmpp    r1, r3, lsl r1
-0+030 <[^>]*> e310f00a ?       tstp    r0, #10
-0+034 <[^>]*> e112f004 ?       tstp    r2, r4
-0+038 <[^>]*> e115f287 ?       tstp    r5, r7, lsl #5
-0+03c <[^>]*> e111f113 ?       tstp    r1, r3, lsl r1

diff --git a/gas/testsuite/gas/arm/pinsn.s b/gas/testsuite/gas/arm/pinsn.s
deleted file mode 100644 (file)
index d0afc46..0000000
--- a/gas/testsuite/gas/arm/pinsn.s
+++ /dev/null
@@ -1,16 +0,0 @@
-teqp   r0, #10
-teqp   r2, r4
-teqp   r5, r7, lsl #5
-teqp   r1, r3, lsl r1
-cmnp   r0, #10
-cmnp   r2, r4
-cmnp   r5, r7, lsl #5
-cmnp   r1, r3, lsl r1
-cmpp   r0, #10
-cmpp   r2, r4
-cmpp   r5, r7, lsl #5
-cmpp   r1, r3, lsl r1
-tstp   r0, #10
-tstp   r2, r4
-tstp   r5, r7, lsl #5
-tstp   r1, r3, lsl r1

diff --git a/gas/testsuite/gas/arm/wince_inst.d b/gas/testsuite/gas/arm/wince_inst.d
index 390e4536ae6d9d9c98d3c4e73614156777877798..4bbac43861d983159f78a502c7481a6361c2398e 100644 (file)
--- a/gas/testsuite/gas/arm/wince_inst.d
+++ b/gas/testsuite/gas/arm/wince_inst.d
@@ -97,22 +97,22 @@ Disassembly of section .text:
 0+14c <[^>]*> e1720004 ?       cmn     r2, r4
 0+150 <[^>]*> e1750287 ?       cmn     r5, r7, lsl #5
 0+154 <[^>]*> e1710113 ?       cmn     r1, r3, lsl r1
-0+158 <[^>]*> e330f00a ?       teq     r0, #10 @ <UNPREDICTABLE>
-0+15c <[^>]*> e132f004 ?       teq     r2, r4  @ <UNPREDICTABLE>
-0+160 <[^>]*> e135f287 ?       teq     r5, r7, lsl #5  @ <UNPREDICTABLE>
-0+164 <[^>]*> e131f113 ?       teq     r1, r3, lsl r1  @ <UNPREDICTABLE>
-0+168 <[^>]*> e370f00a ?       cmn     r0, #10 @ <UNPREDICTABLE>
-0+16c <[^>]*> e172f004 ?       cmn     r2, r4  @ <UNPREDICTABLE>
-0+170 <[^>]*> e175f287 ?       cmn     r5, r7, lsl #5  @ <UNPREDICTABLE>
-0+174 <[^>]*> e171f113 ?       cmn     r1, r3, lsl r1  @ <UNPREDICTABLE>
-0+178 <[^>]*> e350f00a ?       cmp     r0, #10 @ <UNPREDICTABLE>
-0+17c <[^>]*> e152f004 ?       cmp     r2, r4  @ <UNPREDICTABLE>
-0+180 <[^>]*> e155f287 ?       cmp     r5, r7, lsl #5  @ <UNPREDICTABLE>
-0+184 <[^>]*> e151f113 ?       cmp     r1, r3, lsl r1  @ <UNPREDICTABLE>
-0+188 <[^>]*> e310f00a ?       tst     r0, #10 @ <UNPREDICTABLE>
-0+18c <[^>]*> e112f004 ?       tst     r2, r4  @ <UNPREDICTABLE>
-0+190 <[^>]*> e115f287 ?       tst     r5, r7, lsl #5  @ <UNPREDICTABLE>
-0+194 <[^>]*> e111f113 ?       tst     r1, r3, lsl r1  @ <UNPREDICTABLE>
+0+158 <[^>]*> e330f00a ?       teqp    r0, #10 @ p-variant is OBSOLETE
+0+15c <[^>]*> e132f004 ?       teqp    r2, r4  @ p-variant is OBSOLETE
+0+160 <[^>]*> e135f287 ?       teqp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+164 <[^>]*> e131f113 ?       teqp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+168 <[^>]*> e370f00a ?       cmnp    r0, #10 @ p-variant is OBSOLETE
+0+16c <[^>]*> e172f004 ?       cmnp    r2, r4  @ p-variant is OBSOLETE
+0+170 <[^>]*> e175f287 ?       cmnp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+174 <[^>]*> e171f113 ?       cmnp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+178 <[^>]*> e350f00a ?       cmpp    r0, #10 @ p-variant is OBSOLETE
+0+17c <[^>]*> e152f004 ?       cmpp    r2, r4  @ p-variant is OBSOLETE
+0+180 <[^>]*> e155f287 ?       cmpp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+184 <[^>]*> e151f113 ?       cmpp    r1, r3, lsl r1  @ p-variant is OBSOLETE
+0+188 <[^>]*> e310f00a ?       tstp    r0, #10 @ p-variant is OBSOLETE
+0+18c <[^>]*> e112f004 ?       tstp    r2, r4  @ p-variant is OBSOLETE
+0+190 <[^>]*> e115f287 ?       tstp    r5, r7, lsl #5  @ p-variant is OBSOLETE
+0+194 <[^>]*> e111f113 ?       tstp    r1, r3, lsl r1  @ p-variant is OBSOLETE
 0+198 <[^>]*> e0000291 ?       mul     r0, r1, r2
 0+19c <[^>]*> e0110392 ?       muls    r1, r2, r3
 0+1a0 <[^>]*> 10000091 ?       mulne   r0, r1, r0

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index b395cdcf88fee691400a805a35086b24d4a5916b..a83cbbdf8c21565124723ce6f81179ad4742ded3 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3359,6 +3359,7 @@ static const struct mopcode32 mve_opcodes[] =
    %m                  print register mask for ldm/stm instruction
    %o                  print operand2 (immediate or register + shift)
    %p                  print 'p' iff bits 12-15 are 15
+   %O                  print 'OBSOLETE' iff bits 12-15 are 15
    %t                  print 't' iff bit 21 set and bit 24 clear
    %B                  print arm BLX(1) destination
    %C                  print the PSR sub type.
@@ -3969,32 +3970,32 @@ static const struct opcode32 arm_opcodes[] =
     0x01000000, 0x0fb00cff, "mrs%c\t%12-15R, %R"},
 
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o"},
+    0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o"},
+    0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o"},
+    0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o%O"},
 
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x03300000, 0x0ff00000, "teq%p%c\t%16-19r, %o"},
+    0x03300000, 0x0ff00000, "teq%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01300000, 0x0ff00010, "teq%p%c\t%16-19r, %o"},
+    0x01300000, 0x0ff00010, "teq%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01300010, 0x0ff00010, "teq%p%c\t%16-19R, %o"},
+    0x01300010, 0x0ff00010, "teq%p%c\t%16-19R, %o%O"},
 
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o"},
+    0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o"},
+    0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o"},
+    0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o%O"},
 
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o"},
+    0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o"},
+    0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o%O"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
-    0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o"},
+    0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o%O"},
 
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V1),
     0x03800000, 0x0fe00000, "orr%20's%c\t%12-15r, %16-19r, %o"},
@@ -10327,19 +10328,12 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
 
                    case 'p':
                      if ((given & 0x0000f000) == 0x0000f000)
-                       {
-                         arm_feature_set arm_ext_v6 =
-                           ARM_FEATURE_CORE_LOW (ARM_EXT_V6);
-
-                         /* The p-variants of tst/cmp/cmn/teq are the pre-V6
-                            mechanism for setting PSR flag bits.  They are
-                            obsolete in V6 onwards.  */
-                         if (! ARM_CPU_HAS_FEATURE (private_data->features, \
-                                                    arm_ext_v6))
-                           func (stream, dis_style_mnemonic, "p");
-                         else
-                           is_unpredictable = true;
-                       }
+                       func (stream, dis_style_mnemonic, "p");
+                     break;
+                   case 'O':
+                     if ((given & 0x0000f000) == 0x0000f000)
+                       func (stream, dis_style_text,
+                             "\t@ p-variant is OBSOLETE");
                      break;
 
                    case 't':