c4x.c (group1_reg_operand, [...]): Do not check register number before reload.

	* c4x.c (group1_reg_operand, group1_mem_operand, arx_reg_operand,
	c4x_arn_reg_operand, c4x_arn_mem_operand): Do not check register
	number before reload.
	(c4x_adjust_cost): Return zero before reload.
	* c4x.md (load_immed_address+1, load_immed_address+2): Do not
	split before reload.

From-SVN: r39420

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a52bed3e8ce995483313736b2166ca72cf772d2..d4226ee8cfbf382b187f099eebddee0b81d5bbfc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2001-02-03  Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
+
+       * c4x.c (group1_reg_operand, group1_mem_operand, arx_reg_operand,
+       c4x_arn_reg_operand, c4x_arn_mem_operand): Do not check register
+       number before reload.
+       (c4x_adjust_cost): Return zero before reload.
+       * c4x.md (load_immed_address+1, load_immed_address+2): Do not
+       split before reload.
+
 2001-02-03  Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
 
        * c4x.c (c4x_hard_regno_rename_ok): New.

diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c
index a52d3508611dd0e0e9fe0dea9b02b5cdab82b342..fd084b1b7bdbca4d0f3757fedebd9a20cb7bb056 100644 (file)
--- a/gcc/config/c4x/c4x.c
+++ b/gcc/config/c4x/c4x.c
@@ -4102,7 +4102,7 @@ group1_reg_operand (op, mode)
     return 0;
   if (GET_CODE (op) == SUBREG)
     op = SUBREG_REG (op);
-  return REG_P (op) && IS_GROUP1_REG (op);
+  return REG_P (op) && (! reload_completed || IS_GROUP1_REG (op));
 }
 
 
@@ -4122,11 +4122,11 @@ group1_mem_operand (op, mode)
          rtx op0 = XEXP (op, 0);
          rtx op1 = XEXP (op, 1);
 
-         if (((GET_CODE (op0) == REG) && IS_GROUP1_REG (op0))
-             || ((GET_CODE (op1) == REG) && IS_GROUP1_REG (op1)))
+         if ((REG_P (op0) && (! reload_completed || IS_GROUP1_REG (op0)))
+             || (REG_P (op1) && (! reload_completed || IS_GROUP1_REG (op1))))
            return 1;
        }
-      else if ((REG_P (op)) && IS_GROUP1_REG (op))
+      else if ((REG_P (op)) && (! reload_completed || IS_GROUP1_REG (op)))
        return 1;
     }
 
@@ -4145,7 +4145,7 @@ arx_reg_operand (op, mode)
     return 0;
   if (GET_CODE (op) == SUBREG)
     op = SUBREG_REG (op);
-  return REG_P (op) && IS_ADDR_REG (op);
+  return REG_P (op) && (! reload_completed || IS_ADDR_REG (op));
 }
 
 
@@ -4159,7 +4159,7 @@ c4x_arn_reg_operand (op, mode, regno)
     return 0;
   if (GET_CODE (op) == SUBREG)
     op = SUBREG_REG (op);
-  return REG_P (op) && (REGNO (op) == regno);
+  return REG_P (op) && (! reload_completed || (REGNO (op) == regno));
 }
 
 
@@ -4184,16 +4184,16 @@ c4x_arn_mem_operand (op, mode, regno)
          op = XEXP (op, 0);
 
        case REG:
-          if (REG_P (op) && (REGNO (op) == regno))
-           return 1;
-         break;
+          return REG_P (op) && (! reload_completed || (REGNO (op) == regno));
 
        case PRE_MODIFY:
        case POST_MODIFY:
-          if (REG_P (XEXP (op, 0)) && (REGNO (XEXP (op, 0)) == regno))
+          if (REG_P (XEXP (op, 0)) && (! reload_completed 
+                                      || (REGNO (XEXP (op, 0)) == regno)))
            return 1;
           if (REG_P (XEXP (XEXP (op, 1), 1))
-             && (REGNO (XEXP (XEXP (op, 1), 1)) == regno))
+             && (! reload_completed
+                 || (REGNO (XEXP (XEXP (op, 1), 1)) == regno)))
            return 1;
          break;
 
@@ -4202,8 +4202,10 @@ c4x_arn_mem_operand (op, mode, regno)
            rtx op0 = XEXP (op, 0);
            rtx op1 = XEXP (op, 1);
 
-           if (((GET_CODE (op0) == REG) && (REGNO (op0) == regno)) 
-               || ((GET_CODE (op1) == REG) && (REGNO (op1) == regno)))
+           if ((REG_P (op0) && (! reload_completed
+                                || (REGNO (op0) == regno)))
+               || (REG_P (op1) && (! reload_completed
+                                   || (REGNO (op1) == regno))))
              return 1;
          }
          break;
@@ -4899,7 +4901,7 @@ c4x_adjust_cost (insn, link, dep_insn, cost)
 {
   /* Don't worry about this until we know what registers have been
      assigned.  */
-  if (! reload_completed)
+  if (flag_schedule_insns == 0 && ! reload_completed)
     return 0;
 
   /* How do we handle dependencies where a read followed by another

diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md
index 3a81ef65d24f5176cc911e85cebe960b103a1f1a..d6493fe41a0cd58bc060a88dedfde50d133f3b2f 100644 (file)
--- a/gcc/config/c4x/c4x.md
+++ b/gcc/config/c4x/c4x.md
@@ -966,7 +966,7 @@
 (define_split
   [(set (match_operand:QI 0 "std_reg_operand" "")
         (match_operand:QI 1 "symbolic_address_operand" ""))]
-  "! TARGET_C3X && ! TARGET_TI"
+  "reload_completed && ! TARGET_C3X && ! TARGET_TI"
   [(set (match_dup 0) (high:QI (match_dup 1)))
    (set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))]
   "")
@@ -1207,7 +1207,7 @@
   [(set (match_operand:QI 0 "std_reg_operand" "")
         (match_operand:QI 1 "symbolic_address_operand" ""))
    (clobber (reg:QI 16))]
-  "! TARGET_C3X && ! TARGET_TI"
+  "reload_completed && ! TARGET_C3X && ! TARGET_TI"
   [(set (match_dup 0) (high:QI (match_dup 1)))
    (set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))]
   "")
@@ -1220,10 +1220,9 @@
   [(set (match_operand:QI 0 "reg_operand" "")
         (match_operand:QI 1 "symbolic_address_operand" ""))
    (clobber (reg:QI 16))]
-  "! TARGET_SMALL 
-   && (TARGET_C3X || TARGET_TI
-       || (reload_completed
-           && ! std_reg_operand (operands[0], QImode)))"
+  "reload_completed
+   && ! TARGET_SMALL 
+   && (TARGET_C3X || TARGET_TI || ! std_reg_operand (operands[0], QImode))"
   [(set (match_dup 2) (high:QI (match_dup 3)))
    (set (match_dup 0) (match_dup 4))
    (use (match_dup 1))]
@@ -1244,10 +1243,9 @@
   [(set (match_operand:QI 0 "reg_operand" "")
         (match_operand:QI 1 "symbolic_address_operand" ""))
    (clobber (reg:QI 16))]
-  "TARGET_SMALL
-   && (TARGET_C3X || TARGET_TI
-       || (reload_completed
-           && ! std_reg_operand (operands[0], QImode)))"
+  "reload_completed
+   && TARGET_SMALL
+   && (TARGET_C3X || TARGET_TI || ! std_reg_operand (operands[0], QImode))"
   [(set (match_dup 0) (match_dup 2))
    (use (match_dup 1))]
   "