arm64: dts: renesas: gray-hawk-single: Describe AVB1 and AVB2

Describe the two Marvell 88Q2110/QFN40 PHYs available on the R-Car V4M
Gray Hawk single-board. The two PHYs are wired up on the board by
default.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250107160127.528933-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
index f3a744e17d48046b6711445a9359c50dc293b899..55b18776593230fa84cf870063e3b71afa739803 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
@@ -46,6 +46,8 @@
                serial0 = &hscif0;
                serial1 = &hscif2;
                ethernet0 = &avb0;
+               ethernet1 = &avb1;
+               ethernet2 = &avb2;
        };
 
        can_transceiver0: can-phy0 {
@@ -219,6 +221,48 @@
        };
 };
 
+&avb1 {
+       pinctrl-0 = <&avb1_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&avb1_phy>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>;
+               reset-post-delay-us = <4000>;
+
+               avb1_phy: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       reg = <0>;
+                       interrupts-extended = <&gpio6 3 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};
+
+&avb2 {
+       pinctrl-0 = <&avb2_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&avb2_phy>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+               reset-post-delay-us = <4000>;
+
+               avb2_phy: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       reg = <0>;
+                       interrupts-extended = <&gpio5 4 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};
+
 &can_clk {
        clock-frequency = <40000000>;
 };
@@ -563,6 +607,56 @@
                };
        };
 
+       avb1_pins: avb1 {
+               mux {
+                       groups = "avb1_link", "avb1_mdio", "avb1_rgmii",
+                                "avb1_txcrefclk";
+                       function = "avb1";
+               };
+
+               link {
+                       groups = "avb1_link";
+                       bias-disable;
+               };
+
+               mdio {
+                       groups = "avb1_mdio";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               rgmii {
+                       groups = "avb1_rgmii";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+       };
+
+       avb2_pins: avb2 {
+               mux {
+                       groups = "avb2_link", "avb2_mdio", "avb2_rgmii",
+                                "avb2_txcrefclk";
+                       function = "avb2";
+               };
+
+               link {
+                       groups = "avb2_link";
+                       bias-disable;
+               };
+
+               mdio {
+                       groups = "avb2_mdio";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               rgmii {
+                       groups = "avb2_rgmii";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+       };
+
        can_clk_pins: can-clk {
                groups = "can_clk";
                function = "can_clk";