]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
test: Fix XPASS of bb-slp-43.c for RVV
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Mon, 6 Nov 2023 22:35:31 +0000 (06:35 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 7 Nov 2023 07:25:20 +0000 (15:25 +0800)
RVV is variable length vector but also has 256 bit VLS mode vector.
This test is vectorized as:

f:
        vsetivli        zero,8,e32,m2,ta,ma
        vle32.v v2,0(a0)
        vmv.v.i v4,1
        vle16.v v1,0(a1)
        vmseq.vv        v0,v2,v4
        vsetvli zero,zero,e16,m1,ta,ma
        vmseq.vi        v1,v1,2
        vsetvli zero,zero,e32,m2,ta,ma
        vmv.v.i v2,0
        vmand.mm        v0,v0,v1
        vmerge.vvm      v2,v2,v4,v0
        vse32.v v2,0(a0)
        ret

Use 256 bit vector, so remove XFAIL for 256 bits vector.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/bb-slp-43.c: Fix XPASS for RVV.

gcc/testsuite/gcc.dg/vect/bb-slp-43.c

index a65d9513c4d519ca4bd96840e172a47ca957fa26..dad2d24262d3423f48e209cb422e4cd798e0c2d3 100644 (file)
@@ -14,4 +14,4 @@ f (int *restrict x, short *restrict y)
 }
 
 /* { dg-final { scan-tree-dump-not "mixed mask and nonmask" "slp2" } } */
-/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail vect_variable_length } } } */
+/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail { vect_variable_length && { ! vect256 } } } } } */