-/* Generic should produce code tuned for Core-i7 (and newer chips)
- and btver1 (and newer chips). */
+/* Generic should produce code tuned for Haswell (and newer chips)
+ and znver1 (and newer chips):
+ 1. Don't align memory.
+ 2. For known sizes, prefer vector loop, unroll loop with 4 moves or
+ stores per iteration without aligning the loop, up to 256 bytes.
+ 3. For unknown sizes, use memcpy/memset.
+ 4. Since each loop iteration has 4 stores and 8 stores for zeroing
+ with unroll loop may be needed, change CLEAR_RATIO to 10 so that
+ zeroing up to 72 bytes are fully unrolled with 9 stores without
+ SSE.
+ */
static stringop_algs generic_memcpy[2] = {
- {libcall, {{32, loop, false}, {8192, rep_prefix_4_byte, false},
- {-1, libcall, false}}},
- {libcall, {{32, loop, false}, {8192, rep_prefix_8_byte, false},
- {-1, libcall, false}}}};
+ {libcall,
+ {{256, vector_loop, true},
+ {256, unrolled_loop, true},
+ {-1, libcall, true}}},
+ {libcall,
+ {{256, vector_loop, true},
+ {256, unrolled_loop, true},
+ {-1, libcall, true}}}};
static stringop_algs generic_memset[2] = {
- {libcall, {{32, loop, false}, {8192, rep_prefix_4_byte, false},
- {-1, libcall, false}}},
- {libcall, {{32, loop, false}, {8192, rep_prefix_8_byte, false},
- {-1, libcall, false}}}};
+ {libcall,
+ {{256, vector_loop, true},
+ {256, unrolled_loop, true},
+ {-1, libcall, true}}},
+ {libcall,
+ {{256, vector_loop, true},
+ {256, unrolled_loop, true},
+ {-1, libcall, true}}}};
static const
struct processor_costs generic_cost = {
{
COSTS_N_INSNS (1), /* cost of movzx */
8, /* "large" insn */
17, /* MOVE_RATIO */
- 6, /* CLEAR_RATIO */
+ 10, /* CLEAR_RATIO */
{6, 6, 6}, /* cost of loading integer registers
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64-v2 -std=gnu++17" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z4TestPc:
+**.LFB[0-9]+:
+** .cfi_startproc
+** movzbl -1\(%rdi\), %eax
+** pxor %xmm1, %xmm1
+** movd %eax, %xmm0
+** pshufb %xmm1, %xmm0
+** movups %xmm0, \(%rdi\)
+** movups %xmm0, 16\(%rdi\)
+** movups %xmm0, 32\(%rdi\)
+** movups %xmm0, 48\(%rdi\)
+** ret
+**...
+*/
+
+#include <x86intrin.h>
+
+void
+Test (char* dst)
+{
+ __m128i pattern = _mm_set1_epi8(dst[-1]);
+ for (int i = 0; i < 4; i++)
+ _mm_storeu_si128(reinterpret_cast<__m128i*>(dst + 16 * i), pattern);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64-v2 -std=gnu++17" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z4TestPc:
+**.LFB[0-9]+:
+** .cfi_startproc
+** movsbl -1\(%rdi\), %eax
+** pxor %xmm1, %xmm1
+** movd %eax, %xmm0
+** pshufb %xmm1, %xmm0
+** movups %xmm0, \(%rdi\)
+** movups %xmm0, 16\(%rdi\)
+** movups %xmm0, 32\(%rdi\)
+** movups %xmm0, 48\(%rdi\)
+** ret
+**...
+*/
+
+void
+Test (char*s)
+{
+ __builtin_memset (s, s[-1], 64);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64 -std=c++20 -DUSE_CHAR" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z6squarei:
+**.LFB[0-9]+:
+** .cfi_startproc
+** subq \$104, %rsp
+** .cfi_def_cfa_offset 112
+** pxor %xmm0, %xmm0
+** movq %rsp, %rdi
+** movaps %xmm0, \(%rsp\)
+** movaps %xmm0, 16\(%rsp\)
+** movaps %xmm0, 32\(%rsp\)
+** movaps %xmm0, 48\(%rsp\)
+** movaps %xmm0, 64\(%rsp\)
+** movaps %xmm0, 80\(%rsp\)
+** call _Z3fooPc
+** addq \$104, %rsp
+** .cfi_def_cfa_offset 8
+** ret
+**...
+*/
+
+#include <cstddef>
+
+#ifdef USE_CHAR
+# define TYPE char
+#else
+# define TYPE std::byte
+#endif
+
+extern int foo(TYPE *arr);
+
+int square(int num)
+{
+ TYPE arr[96] = {};
+ return foo(arr);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64 -std=c++20" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z6squarei:
+**.LFB[0-9]+:
+** .cfi_startproc
+** subq \$104, %rsp
+** .cfi_def_cfa_offset 112
+** pxor %xmm0, %xmm0
+** movq %rsp, %rdi
+** movaps %xmm0, \(%rsp\)
+** movaps %xmm0, 16\(%rsp\)
+** movaps %xmm0, 32\(%rsp\)
+** movaps %xmm0, 48\(%rsp\)
+** movaps %xmm0, 64\(%rsp\)
+** movaps %xmm0, 80\(%rsp\)
+** call _Z3fooPSt4byte
+** addq \$104, %rsp
+** .cfi_def_cfa_offset 8
+** ret
+**...
+*/
+
+#include <cstddef>
+
+#ifdef USE_CHAR
+# define TYPE char
+#else
+# define TYPE std::byte
+#endif
+
+extern int foo(TYPE *arr);
+
+int square(int num)
+{
+ TYPE arr[96] = {};
+ return foo(arr);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64 -std=c++17 -DMODE=0" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z22makeDefaultConstructedv:
+**.LFB[0-9]+:
+** .cfi_startproc
+** pxor %xmm0, %xmm0
+** movq \$0, 80\(%rdi\)
+** movq %rdi, %rax
+** movups %xmm0, \(%rdi\)
+** movups %xmm0, 16\(%rdi\)
+** movups %xmm0, 32\(%rdi\)
+** movups %xmm0, 48\(%rdi\)
+** movups %xmm0, 64\(%rdi\)
+** ret
+**...
+*/
+
+struct S {
+ long int c[10] = {};
+ int x{};
+#if MODE == 0
+#elif MODE == 1
+ S() = default;
+#elif MODE == 2
+ S() noexcept {}
+#endif
+};
+
+S makeDefaultConstructed() { return S{}; }
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64 -std=c++17 -DMODE=1" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z22makeDefaultConstructedv:
+**.LFB[0-9]+:
+** .cfi_startproc
+** pxor %xmm0, %xmm0
+** movq \$0, 80\(%rdi\)
+** movq %rdi, %rax
+** movups %xmm0, \(%rdi\)
+** movups %xmm0, 16\(%rdi\)
+** movups %xmm0, 32\(%rdi\)
+** movups %xmm0, 48\(%rdi\)
+** movups %xmm0, 64\(%rdi\)
+** ret
+**...
+*/
+
+#include "memset-pr118276-1a.C"
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=x86-64 -std=c++17 -DMODE=2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**_Z22makeDefaultConstructedv:
+**.LFB[0-9]+:
+** .cfi_startproc
+** pxor %xmm0, %xmm0
+** movl \$0, 80\(%rdi\)
+** movq %rdi, %rax
+** movups %xmm0, \(%rdi\)
+** movups %xmm0, 16\(%rdi\)
+** movups %xmm0, 32\(%rdi\)
+** movups %xmm0, 48\(%rdi\)
+** movups %xmm0, 64\(%rdi\)
+** ret
+**...
+*/
+
+#include "memset-pr118276-1a.C"
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
return var.four.internal1;
}
-/* { dg-final { scan-assembler "movl\t\\\$0," } } */
-/* { dg-final { scan-assembler "movl\t\\\$16," { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "rep stosq" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "movl\t\\\$32," { target ia32 } } } */
-/* { dg-final { scan-assembler "rep stosl" { target ia32 } } } */
+/* { dg-final { scan-assembler-times "pxor\t%xmm0, %xmm0" 1 } } */
+/* { dg-final { scan-assembler-times "movaps\t%xmm0, " 8 } } */
padding. */
/* { dg-do compile } */
/* { dg-options "-ftrivial-auto-var-init=zero -march=x86-64" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**...
+** pxor %xmm0, %xmm0
+**...
+**.L[0-9]+:
+** movl %esi, %ecx
+** movaps %xmm0, \(%rdx,%rcx\)
+** movaps %xmm0, 16\(%rdx,%rcx\)
+** movaps %xmm0, 32\(%rdx,%rcx\)
+** movaps %xmm0, 48\(%rdx,%rcx\)
+** addl \$64, %esi
+** cmpl %edi, %esi
+** jb .L[0-9]+
+**...
+*/
struct test_trailing_hole {
int one;
return var[2].four;
}
-/* { dg-final { scan-assembler "movl\t\\\$0," } } */
-/* { dg-final { scan-assembler "movl\t\\\$20," { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "rep stosq" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "movl\t\\\$40," { target ia32} } } */
-/* { dg-final { scan-assembler "rep stosl" { target ia32 } } } */
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**...
+** xorl %edx, %edx
+**...
+**.L[0-9]+:
+** movl %edx, %eax
+** addl \$32, %edx
+** movq \(%rsi,%rax\), %r10
+** movq 8\(%rsi,%rax\), %r9
+** movq 16\(%rsi,%rax\), %r8
+** movq 24\(%rsi,%rax\), %rcx
+** movq %r10, \(%rdi,%rax\)
+** movq %r9, 8\(%rdi,%rax\)
+** movq %r8, 16\(%rdi,%rax\)
+** movq %rcx, 24\(%rdi,%rax\)
+** cmpl \$224, %edx
+** jb .L[0-9]+
+**...
+*/
+
+void
+foo (char *dest, char *src)
+{
+ __builtin_memcpy (dest, src, 253);
+}
+
+/* { dg-final { scan-assembler-not "rep mov" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-avx" } */
+/* { dg-final { scan-assembler "jmp\tmemcpy" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\tmemcpy" { target ia32 } } } */
+/* { dg-final { scan-assembler-not "rep movsb" } } */
+
+void
+foo (char *dest, char *src)
+{
+ __builtin_memcpy (dest, src, 257);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+** .cfi_startproc
+** subq \$16, %rsp
+** .cfi_def_cfa_offset 24
+** pxor %xmm0, %xmm0
+** movaps %xmm0, -120\(%rsp\)
+** movaps %xmm0, -104\(%rsp\)
+** movaps %xmm0, -88\(%rsp\)
+** movaps %xmm0, -72\(%rsp\)
+** movaps %xmm0, -56\(%rsp\)
+** movaps %xmm0, -40\(%rsp\)
+** movaps %xmm0, -24\(%rsp\)
+** movaps %xmm0, -8\(%rsp\)
+** xorl %eax, %eax
+** addq \$16, %rsp
+** .cfi_def_cfa_offset 8
+** ret
+**...
+*/
+
+extern int scanf (const char *, ...);
+extern void *memset (void *, int, __SIZE_TYPE__);
+
+int
+foo (void)
+{
+ char buf[128];
+
+#if USE_SCANF
+ if (scanf("%s", buf) != 1)
+ return 42;
+#endif
+
+ memset (buf,0, sizeof (buf));
+ asm volatile("": : :"memory");
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64 -DUSE_SCANF" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+** .cfi_startproc
+** subq \$136, %rsp
+** .cfi_def_cfa_offset 144
+** xorl %eax, %eax
+** movl \$.LC[0-9]+, %edi
+** movq %rsp, %rsi
+** call scanf
+** cmpl \$1, %eax
+** je .L[0-9]+
+** movl \$42, %eax
+** addq \$136, %rsp
+** .cfi_remember_state
+** .cfi_def_cfa_offset 8
+** ret
+** .p2align 4,,10
+** .p2align 3
+**.L[0-9]+:
+** .cfi_restore_state
+** pxor %xmm0, %xmm0
+** movaps %xmm0, \(%rsp\)
+** movaps %xmm0, 16\(%rsp\)
+** movaps %xmm0, 32\(%rsp\)
+** movaps %xmm0, 48\(%rsp\)
+** movaps %xmm0, 64\(%rsp\)
+** movaps %xmm0, 80\(%rsp\)
+** movaps %xmm0, 96\(%rsp\)
+** movaps %xmm0, 112\(%rsp\)
+** xorl %eax, %eax
+** addq \$136, %rsp
+** .cfi_def_cfa_offset 8
+** ret
+**...
+*/
+
+extern int scanf (const char *, ...);
+extern void *memset (void *, int, __SIZE_TYPE__);
+
+int
+foo (void)
+{
+ char buf[128];
+
+#if USE_SCANF
+ if (scanf("%s", buf) != 1)
+ return 42;
+#endif
+
+ memset (buf,0, sizeof (buf));
+ asm volatile("": : :"memory");
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+** .cfi_startproc
+** xorl %eax, %eax
+**.L[0-9]+:
+** movl %eax, %edx
+** addl \$32, %eax
+** movq \$0, \(%rdi,%rdx\)
+** movq \$0, 8\(%rdi,%rdx\)
+** movq \$0, 16\(%rdi,%rdx\)
+** movq \$0, 24\(%rdi,%rdx\)
+** cmpl \$224, %eax
+** jb .L[0-9]+
+**...
+*/
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 253);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* { dg-final { scan-assembler-not "jmp\tmemset" } } */
+/* { dg-final { scan-assembler-not "rep stosb" } } */
+
+struct foo
+{
+ char buf[41];
+};
+
+void
+zero(struct foo *f)
+{
+ __builtin_memset(f->buf, 0, sizeof(f->buf));
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-avx" } */
+/* { dg-final { scan-assembler "jmp\tmemset" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\tmemset" { target ia32 } } } */
+/* { dg-final { scan-assembler-not "rep stosb" } } */
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 257);
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+** .cfi_startproc
+** movq \$0, \(%rdi\)
+** movq \$0, 8\(%rdi\)
+** movq \$0, 16\(%rdi\)
+** movq \$0, 24\(%rdi\)
+** movq \$0, 32\(%rdi\)
+** movq \$0, 40\(%rdi\)
+** movq \$0, 48\(%rdi\)
+** movq \$0, 56\(%rdi\)
+** movb \$0, 64\(%rdi\)
+** ret
+**...
+*/
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 65);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**...
+**.LFB[0-9]+:
+** .cfi_startproc
+** xorl %eax, %eax
+**.L[0-9]+:
+** movl %eax, %edx
+** addl \$32, %eax
+** movq \$0, \(%rdi,%rdx\)
+** movq \$0, 8\(%rdi,%rdx\)
+** movq \$0, 16\(%rdi,%rdx\)
+** movq \$0, 24\(%rdi,%rdx\)
+** cmpl \$64, %eax
+** jb .L[0-9]+
+**...
+*/
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 81);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-sse" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**...
+**.LFB[0-9]+:
+** .cfi_startproc
+** xorl %eax, %eax
+**.L[0-9]+:
+** movl %eax, %edx
+** addl \$32, %eax
+** movq \$0, \(%rdi,%rdx\)
+** movq \$0, 8\(%rdi,%rdx\)
+** movq \$0, 16\(%rdi,%rdx\)
+** movq \$0, 24\(%rdi,%rdx\)
+** cmpl \$64, %eax
+** jb .L[0-9]+
+**...
+*/
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 95);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=generic -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**...
+** pxor %xmm0, %xmm0
+** xorl %eax, %eax
+**.L[0-9]+:
+** movl %eax, %edx
+** addl \$64, %eax
+** movups %xmm0, \(%rdi,%rdx\)
+** movups %xmm0, 16\(%rdi,%rdx\)
+** movups %xmm0, 32\(%rdi,%rdx\)
+** movups %xmm0, 48\(%rdi,%rdx\)
+** cmpl \$192, %eax
+** jb .L[0-9]+
+**...
+*/
+
+void
+foo (char *dest)
+{
+ __builtin_memset (dest, 0, 254);
+}
+
+/* { dg-final { scan-assembler-not "rep stos" } } */
/* { dg-do compile } */
/* { dg-require-ifunc "" } */
/* { dg-options "-O2 -march=x86-64" } */
-/* { dg-final { scan-assembler-times "rep mov" 1 } } */
+/* { dg-final { scan-assembler-not "rep mov" } } */
__attribute__((target_clones("default","arch=icelake-server")))
void
/* { dg-do assemble } */
/* { dg-options "-O2 -mno-sse -mtune=generic -save-temps" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */
+/* { dg-final { check-function-bodies "**" "" "" { target lp64 } {^\t?\.} } } */
+
+/*
+**bar:
+**...
+**.L[0-9]+:
+** movl %edx, %eax
+** addl \$32, %edx
+** movq %gs:m\(%rax\), %r9
+** movq %gs:m\+8\(%rax\), %r8
+** movq %gs:m\+16\(%rax\), %rsi
+** movq %gs:m\+24\(%rax\), %rcx
+** movq %r9, \(%rdi,%rax\)
+** movq %r8, 8\(%rdi,%rax\)
+** movq %rsi, 16\(%rdi,%rax\)
+** movq %rcx, 24\(%rdi,%rax\)
+** cmpl \$224, %edx
+** jb .L[0-9]+
+**...
+*/
typedef unsigned long uword __attribute__ ((mode (word)));
__seg_gs struct a m;
void bar (struct a *dst) { *dst = m; }
-/* { dg-final { scan-assembler "gs\[ \t\]+rep\[; \t\]+movs(l|q)" { target { ! x32 } } } } */
-/* { dg-final { scan-assembler-not "gs\[ \t\]+rep\[; \t\]+movs(l|q)" { target x32 } } } */
+/* { dg-final { scan-assembler-not "rep movs" } } */
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -fdump-rtl-pro_and_epilogue -fno-stack-protector" } */
+/* { dg-options "-O2 -mmemset-strategy=rep_8byte:-1:align -fdump-rtl-pro_and_epilogue -fno-stack-protector" } */
enum machine_mode
{
/* { dg-do compile } */
-/* { dg-options "-O2 -mtune=generic -fshrink-wrap -fdump-rtl-pro_and_epilogue -fno-stack-protector" } */
+/* { dg-options "-O2 -mtune=generic -mstringop-strategy=rep_byte -fshrink-wrap -fdump-rtl-pro_and_epilogue -fno-stack-protector" } */
/* { dg-additional-options "-mno-avx" { target ia32 } } */
/* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } } */