]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64/mte: Add hwcap for asymmetric mode
authorMark Brown <broonie@kernel.org>
Wed, 16 Feb 2022 17:32:23 +0000 (17:32 +0000)
committerWill Deacon <will@kernel.org>
Fri, 25 Feb 2022 14:41:05 +0000 (14:41 +0000)
Allow userspace to detect support for asymmetric mode by providing a hwcap
for it, using the official feature name FEAT_MTE3.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com>
Tested-by: Branislav Rankov <branislav.rankov@arm.com>
Link: https://lore.kernel.org/r/20220216173224.2342152-4-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arm64/elf_hwcaps.rst
arch/arm64/include/asm/hwcap.h
arch/arm64/include/uapi/asm/hwcap.h
arch/arm64/kernel/cpufeature.c
arch/arm64/kernel/cpuinfo.c

index b72ff17d600aee7932157e993e580f41a2a7c426..a8f30963e550d372763b3b1a63a7fb38d733b533 100644 (file)
@@ -259,6 +259,11 @@ HWCAP2_RPRES
 
     Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
 
+HWCAP2_MTE3
+
+    Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described
+    by Documentation/arm64/memory-tagging-extension.rst.
+
 4. Unused AT_HWCAP bits
 -----------------------
 
index f68fbb207473047d7756cb2cc1b2bc29e4c4da03..8db5ec0089dbd3d476da432faa316102860b1bde 100644 (file)
 #define KERNEL_HWCAP_ECV               __khwcap2_feature(ECV)
 #define KERNEL_HWCAP_AFP               __khwcap2_feature(AFP)
 #define KERNEL_HWCAP_RPRES             __khwcap2_feature(RPRES)
+#define KERNEL_HWCAP_MTE3              __khwcap2_feature(MTE3)
 
 /*
  * This yields a mask that user programs can use to figure out what
index f03731847d9dfdbed849baceafb61f91745bd1cc..99cb5d383048dd8dedb08f51be0d3951dc6b0f4f 100644 (file)
@@ -78,5 +78,6 @@
 #define HWCAP2_ECV             (1 << 19)
 #define HWCAP2_AFP             (1 << 20)
 #define HWCAP2_RPRES           (1 << 21)
+#define HWCAP2_MTE3            (1 << 22)
 
 #endif /* _UAPI__ASM_HWCAP_H */
index e5f23dab1c8df8acc56a64d982cb065984167ecb..5809d5d59258f5b26676ac0790a30401ee8e5070 100644 (file)
@@ -2488,6 +2488,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
 #endif
 #ifdef CONFIG_ARM64_MTE
        HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE),
+       HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE_ASYMM, CAP_HWCAP, KERNEL_HWCAP_MTE3),
 #endif /* CONFIG_ARM64_MTE */
        HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV),
        HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP),
index 591c18a889a56fee002fecce7f686c598bb92244..330b92ea863aad3e61e7559ebc8a37de215497b5 100644 (file)
@@ -97,6 +97,7 @@ static const char *const hwcap_str[] = {
        [KERNEL_HWCAP_ECV]              = "ecv",
        [KERNEL_HWCAP_AFP]              = "afp",
        [KERNEL_HWCAP_RPRES]            = "rpres",
+       [KERNEL_HWCAP_MTE3]             = "mte3",
 };
 
 #ifdef CONFIG_COMPAT