]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: rcar-gen2: Add reset control properties for display
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 18 Feb 2020 13:30:16 +0000 (14:30 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 24 Feb 2020 13:03:33 +0000 (14:03 +0100)
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen2 SoCs.  Note that on these SoCs, there is
only a single reset for all DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-2-geert+renesas@glider.be
arch/arm/boot/dts/r8a7790.dtsi
arch/arm/boot/dts/r8a7791.dtsi
arch/arm/boot/dts/r8a7792.dtsi
arch/arm/boot/dts/r8a7793.dtsi
arch/arm/boot/dts/r8a7794.dtsi

index 334ba19769b998ac8968a0e08a76ef052b5cb01b..e5ef9fd4284ae436d54c394e03959ae30ef06fb9 100644 (file)
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 722>;
                        clock-names = "du.0", "du.1", "du.2";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 59a55e87fcc693dfc472c5e67264d0417af230b9..6e5bd86731cdea8bd4d82105e2ab2d58f2f1c608 100644 (file)
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 39af16caa2aef5011791fddd3237ec93ec8967cf..4627eefa502b7677e72fcd99d205523079f3e62b 100644 (file)
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index eef035c4d98341b648b0c11d48bc32028486be19..dadbda16161b745715e7ff1ff70be7853c91da75 100644 (file)
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {
index 05ef79c6ed7f6b61266a95636e9e826fddfc7936..2c9e7a1ebfec1863ab7a9c34b5ece4a34b0cf8d3 100644 (file)
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
+                       resets = <&cpg 724>;
+                       reset-names = "du.0";
                        status = "disabled";
 
                        ports {