FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT
but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is
not set. Among other things, it makes some of the cmse tests (eg.
gcc.target/arm/cmse/baseline/softfp.c) fail when targeting
-march=armv8-m.base -mcmse -mfpu=<something> -mfloat-abi=softfp. This
commit adds an extra check for TARGET_32BIT to TARGET_HARD_FLOAT such
that it is false on TARGET_THUMB1 targets even when a FPU is specified.
2018-12-19 thomas Preud'homme <thomas.preudhomme@linaro.org>
gcc/
* config/arm/arm.h (TARGET_HARD_FLOAT): Restrict to TARGET_32BIT
targets.
* config/arm/arm.c (output_return_instruction): Only check
TARGET_HARD_FLOAT to decide whether FP instructions are available.
gcc/testsuite/
* gcc.target/arm/cmse/baseline/softfp.c: Force an FPU.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@267270
138bc75d-0d04-0410-961f-
82ee72b054a4
+2018-12-19 Thomas Preud'homme <thomas.preudhomme@linaro.org>
+
+ * config/arm/arm.h (TARGET_HARD_FLOAT): Restrict to TARGET_32BIT
+ targets.
+ * config/arm/arm.c (output_return_instruction): Only check
+ TARGET_HARD_FLOAT to decide whether FP instructions are available.
+
2018-12-19 Tom de Vries <tom@codesourcery.com>
* doc/sourcebuild.texi (Commands for use in dg-final, Scan optimization
"msr%s\tAPSR_nzcvq, %%|lr", conditional);
output_asm_insn (instr, & operand);
- if (TARGET_HARD_FLOAT && !TARGET_THUMB1)
+ if (TARGET_HARD_FLOAT)
{
/* Clear the cumulative exception-status bits (0-4,7) and the
condition code bits (28-31) of the FPSCR. We need to
/* Use hardware floating point instructions. */
#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT \
&& bitmap_bit_p (arm_active_target.isa, \
- isa_bit_vfpv2))
+ isa_bit_vfpv2) \
+ && TARGET_32BIT)
#define TARGET_SOFT_FLOAT (!TARGET_HARD_FLOAT)
/* User has permitted use of FP instructions, if they exist for this
target. */
+2018-12-19 Thomas Preud'homme <thomas.preudhomme@linaro.org>
+
+ * gcc.target/arm/cmse/baseline/softfp.c: Force an FPU.
+
2018-12-19 Tom de Vries <tdevries@suse.de>
* gcc.dg/goacc/nvptx-merged-loop.c: Move to
/* { dg-do compile } */
-/* { dg-options "-mcmse -mfloat-abi=softfp" } */
+/* Force an FPU to test that it is ignored for Thumb-1 -like targets and that
+ no clearing of VFP register occurs. */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
double __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);