arm: fix warning when -mcpu=neoverse-n1 is used with -mfpu=neon [PR100067]

If the compiler is configured with --with-fpu=<!auto> (or invoked
with, say, -mfpu=neon), then specifying -mcpu=neoverse-n1 can lead to
an unexpected warning: cc1: warning: switch ‘-mcpu=neoverse-n1’
conflicts with ‘-march=armv8.2-a’ switch

The fix for this is to correctly remove all the feature bits relating
to simd/fp units when -mfpu is used, not just those bits that form
part of the -mfpu specification (which is a subset).

gcc:
	PR target/100067
	* config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits
	from the isa_delta when -mfpu has been used.
	(arm_options_perform_arch_sanity_checks): It's the architecture that
	lacks an FPU not the processor.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8910dad82146f12559ca613ddabe3d651161b70d..475fb0d827f43e5b2750f673125e1ac54134688e 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3230,21 +3230,22 @@ arm_configure_build_target (struct arm_build_target *target,
          bitmap_xor (isa_delta, cpu_isa, target->isa);
          /* Ignore any bits that are quirk bits.  */
          bitmap_and_compl (isa_delta, isa_delta, isa_quirkbits);
-         /* Ignore (for now) any bits that might be set by -mfpu.  */
-         bitmap_and_compl (isa_delta, isa_delta, isa_all_fpubits_internal);
-
-         /* And if the target ISA lacks floating point, ignore any
-            extensions that depend on that.  */
-         if (!bitmap_bit_p (target->isa, isa_bit_vfpv2))
+         /* If the user (or the default configuration) has specified a
+            specific FPU, then ignore any bits that depend on the FPU
+            configuration.  Do similarly if using the soft-float
+            ABI.  */
+         if (opts->x_arm_fpu_index != TARGET_FPU_auto
+             || arm_float_abi == ARM_FLOAT_ABI_SOFT)
            bitmap_and_compl (isa_delta, isa_delta, isa_all_fpbits);
 
          if (!bitmap_empty_p (isa_delta))
            {
              if (warn_compatible)
                warning (0, "switch %<-mcpu=%s%> conflicts "
-                        "with %<-march=%s%> switch",
-                        arm_selected_cpu->common.name,
-                        arm_selected_arch->common.name);
+                        "with switch %<-march=%s%>",
+                        opts->x_arm_cpu_string,
+                        opts->x_arm_arch_string);
+
              /* -march wins for code generation.
                 -mcpu wins for default tuning.  */
              if (!arm_selected_tune)
@@ -3395,7 +3396,9 @@ arm_configure_build_target (struct arm_build_target *target,
       auto_sbitmap fpu_bits (isa_num_bits);
 
       arm_initialize_isa (fpu_bits, arm_selected_fpu->isa_bits);
-      bitmap_and_compl (target->isa, target->isa, isa_all_fpubits_internal);
+      /* Clear out ALL bits relating to the FPU/simd extensions, to avoid
+        potentially invalid combinations later on that we can't match.  */
+      bitmap_and_compl (target->isa, target->isa, isa_all_fpbits);
       bitmap_ior (target->isa, target->isa, fpu_bits);
     }
 
@@ -3856,7 +3859,7 @@ arm_options_perform_arch_sanity_checks (void)
          arm_pcs_default = ARM_PCS_AAPCS_VFP;
          if (!bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)
              && !bitmap_bit_p (arm_active_target.isa, isa_bit_mve))
-           error ("%<-mfloat-abi=hard%>: selected processor lacks an FPU");
+           error ("%<-mfloat-abi=hard%>: selected architecture lacks an FPU");
        }
       else
        arm_pcs_default = ARM_PCS_AAPCS;