clk: qcom: videocc-sm8550: Set delay for Venus CLK resets

Some Venus resets may require more time when toggling. Describe that.

The value for SM8550 is known and extracted from the msm-5.15 driver.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-18-c37eba13b5ce@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/videocc-sm8550.c b/drivers/clk/qcom/videocc-sm8550.c
index f3c9dfaee968fb73ea1a5366c95f24c51a212a2c..e3f146347da72521be72e60587878d4912316d7d 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8550.c
+++ b/drivers/clk/qcom/videocc-sm8550.c
@@ -378,8 +378,8 @@ static const struct qcom_reset_map video_cc_sm8550_resets[] = {
        [CVP_VIDEO_CC_MVS0C_BCR] = { 0x8048 },
        [CVP_VIDEO_CC_MVS1_BCR] = { 0x80c8 },
        [CVP_VIDEO_CC_MVS1C_BCR] = { 0x8074 },
-       [VIDEO_CC_MVS0C_CLK_ARES] = { 0x8064, 2 },
-       [VIDEO_CC_MVS1C_CLK_ARES] = { 0x8090, 2 },
+       [VIDEO_CC_MVS0C_CLK_ARES] = { .reg = 0x8064, .bit = 2, .udelay = 1000 },
+       [VIDEO_CC_MVS1C_CLK_ARES] = { .reg = 0x8090, .bit = 2, .udelay = 1000 },
 };
 
 static const struct regmap_config video_cc_sm8550_regmap_config = {