]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: dts: sophgo: Add LicheeRV Nano board device tree
authorThomas Bonnefille <thomas.bonnefille@bootlin.com>
Thu, 10 Oct 2024 15:07:07 +0000 (17:07 +0200)
committerInochi Amaoto <inochiama@gmail.com>
Tue, 22 Oct 2024 00:35:16 +0000 (08:35 +0800)
LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO
SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet.

Add only support for UART and SDHCI.

Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20241010-sg2002-v5-2-a0f2e582b932@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
arch/riscv/boot/dts/sophgo/Makefile
arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts [new file with mode: 0644]

index 57ad82a61ea6fc25f72d0ade991e33feaa53266e..47d4243a8f35a7d5572dbf5ef9899297b908afde 100644 (file)
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
+dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
new file mode 100644 (file)
index 0000000..86a712b
--- /dev/null
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include "sg2002.dtsi"
+
+/ {
+       model = "LicheeRV Nano B";
+       compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
+
+       aliases {
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+               gpio2 = &gpio2;
+               gpio3 = &gpio3;
+               serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+               serial4 = &uart4;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+};
+
+&osc {
+       clock-frequency = <25000000>;
+};
+
+&pinctrl {
+       uart0_cfg: uart0-cfg {
+               uart0-pins {
+                       pinmux = <PINMUX(PIN_UART0_TX, 0)>,
+                                <PINMUX(PIN_UART0_RX, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+       };
+
+       sdhci0_cfg: sdhci0-cfg {
+               sdhci0-clk-pins {
+                       pinmux = <PINMUX(PIN_SD0_CLK, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <16100>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-cmd-pins {
+                       pinmux = <PINMUX(PIN_SD0_CMD, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-data-pins {
+                       pinmux = <PINMUX(PIN_SD0_D0, 0)>,
+                                <PINMUX(PIN_SD0_D1, 0)>,
+                                <PINMUX(PIN_SD0_D2, 0)>,
+                                <PINMUX(PIN_SD0_D3, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-cd-pins {
+                       pinmux = <PINMUX(PIN_SD0_CD, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+       };
+};
+
+&sdhci0 {
+       pinctrl-0 = <&sdhci0_cfg>;
+       pinctrl-names = "default";
+       status = "okay";
+       bus-width = <4>;
+       no-1-8-v;
+       no-mmc;
+       no-sdio;
+       disable-wp;
+};
+
+&uart0 {
+       pinctrl-0 = <&uart0_cfg>;
+       pinctrl-names = "default";
+       status = "okay";
+};