]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: keep removing sid.h dependency from si_dma.c
authorAlexandre Demers <alexandre.f.demers@gmail.com>
Sat, 22 Mar 2025 01:46:58 +0000 (21:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Apr 2025 19:18:33 +0000 (15:18 -0400)
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si_dma.c
drivers/gpu/drm/amd/amdgpu/sid.h
drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h

index bfdaaca434ab6a5ed2f69ee0910c54b4e3da2a45..7f18e4875287c22f387c4696ed5e60793fd63e23 100644 (file)
@@ -149,8 +149,8 @@ static int si_dma_start(struct amdgpu_device *adev)
        for (i = 0; i < adev->sdma.num_instances; i++) {
                ring = &adev->sdma.instance[i].ring;
 
-               WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);
-               WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
+               WREG32(mmDMA_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);
+               WREG32(mmDMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
 
                /* Set ring buffer size in dwords */
                rb_bufsz = order_base_2(ring->ring_size / 4);
@@ -477,7 +477,7 @@ static int si_dma_early_init(struct amdgpu_ip_block *ip_block)
 {
        struct amdgpu_device *adev = ip_block->adev;
 
-       adev->sdma.num_instances = 2;
+       adev->sdma.num_instances = SDMA_MAX_INSTANCE;
 
        si_dma_set_ring_funcs(adev);
        si_dma_set_buffer_funcs(adev);
index 085b2b1cf120b51bde86ffeb8a6ce9c7cf552945..0ace1ede24a7575e63cbb6caeabf05feca87cd65 100644 (file)
 #define AMDGPU_PCIE_INDEX      0xc
 #define AMDGPU_PCIE_DATA       0xd
 
-#define DMA_SEM_INCOMPLETE_TIMER_CNTL                     0x3411
-#define DMA_SEM_WAIT_FAIL_TIMER_CNTL                      0x3412
 #define DMA_MODE                                          0x342f
 #define DMA_BUSY_MASK 0x20
 #define SDMA_MAX_INSTANCE 2
index cef0263596918d3643d93c03f06821b38b457761..4dd386b98748ac856f57d088c0adb43243f2164d 100644 (file)
 #define mmDMA_CNTL                                          0x340b
 #define mmDMA_STATUS_REG                                    0x340D
 #define mmDMA_TILING_CONFIG                              0x342E
+#define mmDMA_SEM_INCOMPLETE_TIMER_CNTL                     0x3411
+#define mmDMA_SEM_WAIT_FAIL_TIMER_CNTL                      0x3412
 #define mmDMA_POWER_CNTL                                       0x342F
 #define mmDMA_CLK_CTRL                                 0x3430
 #define mmDMA_PG                                               0x3435