net: stmmac: intel: convert speed_mode_2500() to get_interfaces()

TGL platforms support either SGMII or 2500BASE-X, which is determined
by reading a SERDES register.

Thus, plat->phy_interface (and phylink's supported_interfaces) depend
on this. Use the new .get_interfaces() method to set both
plat->phy_interface and the supported_interfaces bitmap.

This removes the only user of the .speed_mode_2500() method.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/E1uASLx-0021Qs-Uz@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
index 4b263a3c65a43dea898762fbe84a4b309b104c86..9a47015254bbe60b806b00b80dbd5b1d8f78a7c6 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
@@ -284,25 +284,28 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data)
        }
 }
 
-static void intel_speed_mode_2500(struct net_device *ndev, void *intel_data)
+static void tgl_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
+                              unsigned long *interfaces)
 {
-       struct intel_priv_data *intel_priv = intel_data;
-       struct stmmac_priv *priv = netdev_priv(ndev);
-       int serdes_phy_addr = 0;
-       u32 data = 0;
-
-       serdes_phy_addr = intel_priv->mdio_adhoc_addr;
+       struct intel_priv_data *intel_priv = bsp_priv;
+       phy_interface_t interface;
+       int data;
 
        /* Determine the link speed mode: 2.5Gbps/1Gbps */
-       data = mdiobus_read(priv->mii, serdes_phy_addr,
-                           SERDES_GCR);
+       data = mdiobus_read(priv->mii, intel_priv->mdio_adhoc_addr, SERDES_GCR);
+       if (data < 0)
+               return;
 
-       if (((data & SERDES_LINK_MODE_MASK) >> SERDES_LINK_MODE_SHIFT) ==
-           SERDES_LINK_MODE_2G5) {
+       if (FIELD_GET(SERDES_LINK_MODE_MASK, data) == SERDES_LINK_MODE_2G5) {
                dev_info(priv->device, "Link Speed Mode: 2.5Gbps\n");
-               priv->plat->phy_interface = PHY_INTERFACE_MODE_2500BASEX;
                priv->plat->mdio_bus_data->default_an_inband = false;
+               interface = PHY_INTERFACE_MODE_2500BASEX;
+       } else {
+               interface = PHY_INTERFACE_MODE_SGMII;
        }
+
+       __set_bit(interface, interfaces);
+       priv->plat->phy_interface = interface;
 }
 
 /* Program PTP Clock Frequency for different variant of
@@ -929,8 +932,7 @@ static int tgl_common_data(struct pci_dev *pdev,
        plat->rx_queues_to_use = 6;
        plat->tx_queues_to_use = 4;
        plat->clk_ptp_rate = 204800000;
-       plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
-       plat->speed_mode_2500 = intel_speed_mode_2500;
+       plat->get_interfaces = tgl_get_interfaces;
 
        plat->safety_feat_cfg->tsoee = 1;
        plat->safety_feat_cfg->mrxpee = 0;

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h
index a12f8e65f89f1616e71aee30c9e923fd8b5d80fd..7511c224b312592b4c9621c972ad079f563457f4 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h
@@ -21,7 +21,6 @@
 #define SERDES_RATE_MASK       GENMASK(9, 8)
 #define SERDES_PCLK_MASK       GENMASK(14, 12) /* PCLK rate to PHY */
 #define SERDES_LINK_MODE_MASK  GENMASK(2, 1)
-#define SERDES_LINK_MODE_SHIFT 1
 #define SERDES_PWR_ST_SHIFT    4
 #define SERDES_PWR_ST_P0       0x0
 #define SERDES_PWR_ST_P3       0x3