arm64: dts: qcom: msm8996: drop source clock entries from the UFS node

There is no need to mention and/or to touch in any way the intermediate
(source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow
the example lead by all other platforms.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240408-msm8996-fix-ufs-v4-4-ee1a28bf8579@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index e545cae6f59c352b162d25848b224ce947c19998..785ba327f08c4b5c083911cf6d5c8a7bff5c7ada 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -2079,24 +2079,20 @@
                        power-domains = <&gcc UFS_GDSC>;
 
                        clock-names =
-                               "core_clk_src",
                                "core_clk",
                                "bus_clk",
                                "bus_aggr_clk",
                                "iface_clk",
-                               "core_clk_unipro_src",
                                "core_clk_unipro",
                                "core_clk_ice",
                                "ref_clk",
                                "tx_lane0_sync_clk",
                                "rx_lane0_sync_clk";
                        clocks =
-                               <&gcc UFS_AXI_CLK_SRC>,
                                <&gcc GCC_UFS_AXI_CLK>,
                                <&gcc GCC_SYS_NOC_UFS_AXI_CLK>,
                                <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
                                <&gcc GCC_UFS_AHB_CLK>,
-                               <&gcc UFS_ICE_CORE_CLK_SRC>,
                                <&gcc GCC_UFS_UNIPRO_CORE_CLK>,
                                <&gcc GCC_UFS_ICE_CORE_CLK>,
                                <&rpmcc RPM_SMD_LN_BB_CLK>,
@@ -2104,8 +2100,6 @@
                                <&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
                        freq-table-hz =
                                <100000000 200000000>,
-                               <100000000 200000000>,
-                               <0 0>,
                                <0 0>,
                                <0 0>,
                                <0 0>,