]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Sync `aarch64-sys-regs.def' with Binutils.
authorEzra Sitorus <ezra.sitorus@arm.com>
Tue, 1 Jul 2025 08:22:05 +0000 (10:22 +0200)
committerKyrylo Tkachov <ktkachov@nvidia.com>
Tue, 1 Jul 2025 08:52:19 +0000 (10:52 +0200)
This patch updates `aarch64-sys-regs.def', bringing it into sync with
the Binutils source after this change:
https://sourceware.org/pipermail/binutils/2025-March/139894.html

gcc/ChangeLog:

* config/aarch64/aarch64-sys-regs.def: Copy from Binutils.

gcc/config/aarch64/aarch64-sys-regs.def

index 39e6c5c646fb2f05d6e8186ba3ecd3b9ccfd8bc5..d7ef6da4ee8a0af646f3909071c7a1be3d54dd42 100644 (file)
   SYSREG ("mdrar_el1",         CPENC (2,0,1,0,0),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("mdscr_el1",         CPENC (2,0,0,2,2),      0,                      AARCH64_NO_FEATURES)
   SYSREG ("mdselr_el1",                CPENC (2,0,0,4,2),      F_ARCHEXT,              AARCH64_FEATURE (DEBUGv8p9))
-  SYSREG ("mecid_a0_el2",      CPENC (3,4,10,8,1),     0,                      AARCH64_NO_FEATURES)
-  SYSREG ("mecid_a1_el2",      CPENC (3,4,10,8,3),     0,                      AARCH64_NO_FEATURES)
-  SYSREG ("mecid_p0_el2",      CPENC (3,4,10,8,0),     0,                      AARCH64_NO_FEATURES)
-  SYSREG ("mecid_p1_el2",      CPENC (3,4,10,8,2),     0,                      AARCH64_NO_FEATURES)
-  SYSREG ("mecid_rl_a_el3",    CPENC (3,6,10,10,1),    0,                      AARCH64_NO_FEATURES)
-  SYSREG ("mecidr_el2",                CPENC (3,4,10,8,7),     F_REG_READ,             AARCH64_NO_FEATURES)
+  SYSREG ("mecid_a0_el2",      CPENC (3,4,10,8,1),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("mecid_a1_el2",      CPENC (3,4,10,8,3),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("mecid_p0_el2",      CPENC (3,4,10,8,0),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("mecid_p1_el2",      CPENC (3,4,10,8,2),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("mecid_rl_a_el3",    CPENC (3,6,10,10,1),    F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("mecidr_el2",                CPENC (3,4,10,8,7),     F_REG_READ|F_ARCHEXT,   AARCH64_FEATURE (V8_7A))
   SYSREG ("mfar_el3",          CPENC (3,6,6,0,5),      0,                      AARCH64_NO_FEATURES)
   SYSREG ("midr_el1",          CPENC (3,0,0,0,0),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("mpam0_el1",         CPENC (3,0,10,5,1),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("vbar_el2",          CPENC (3,4,12,0,0),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("vbar_el3",          CPENC (3,6,12,0,0),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("vdisr_el2",         CPENC (3,4,12,1,1),     F_ARCHEXT,              AARCH64_FEATURE (RAS))
-  SYSREG ("vmecid_a_el2",      CPENC (3,4,10,9,1),     0,                      AARCH64_NO_FEATURES)
-  SYSREG ("vmecid_p_el2",      CPENC (3,4,10,9,0),     0,                      AARCH64_NO_FEATURES)
+  SYSREG ("vmecid_a_el2",      CPENC (3,4,10,9,1),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
+  SYSREG ("vmecid_p_el2",      CPENC (3,4,10,9,0),     F_ARCHEXT,              AARCH64_FEATURE (V8_7A))
   SYSREG ("vmpidr_el2",                CPENC (3,4,0,0,5),      0,                      AARCH64_NO_FEATURES)
   SYSREG ("vncr_el2",          CPENC (3,4,2,2,0),      F_ARCHEXT,              AARCH64_FEATURE (V8_4A))
   SYSREG ("vpidr_el2",         CPENC (3,4,0,0,0),      0,                      AARCH64_NO_FEATURES)