Pull Amlogic clock driver updates from Jerome Brunet:
- Minor S4 clock fixes
- DT bindings Yaml conversion of the AXG audio controller
- C3 clock controllers support
- Flag added to skip init of already enabled PLLs and avoid relocking
- A1 DT bindings updates for system pll support
- Add missing MODULE_DESCRIPTION where necessary.
* tag 'clk-meson-v6.11-1' of https://github.com/BayLibre/clk-meson:
clk: meson: add missing MODULE_DESCRIPTION() macros
dt-bindings: clock: meson: a1: peripherals: support sys_pll input
dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL
clk: meson: c3: add c3 clock peripherals controller driver
clk: meson: c3: add support for the C3 SoC PLL clock
dt-bindings: clock: add Amlogic C3 peripherals clock controller
dt-bindings: clock: add Amlogic C3 SCMI clock controller support
dt-bindings: clock: add Amlogic C3 PLL clock controller
dt-bindings: clock: meson: Convert axg-audio-clkc to YAML format
clk: meson: s4: fix pwm_j_div parent clock
clk: meson: s4: fix fixed_pll_dco clock