mips.h (mips_cache_flush_func): Prototype.

* config/mips/mips.h (mips_cache_flush_func): Prototype.
(TARGET_OPTIONS): Support -mflush-func= and -mno-flush-func.
(INITIALIZE_TRAMPOLINE): Use mips_cache_flush_func if nonzero.
* config/mips/mips.c (mips_cache_flush_func): New.
* doc/invoke.texi: Document the new options.

From-SVN: r46686

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5a48e8a9dba171b86a071c4278d6911f0672356c..c62bb1259186138eb100f8a81a59f0f4e9ed4f59 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2001-10-31  DJ Delorie  <dj@redhat.com>
+
+       * config/mips/mips.h (mips_cache_flush_func): Prototype.
+       (TARGET_OPTIONS): Support -mflush-func= and -mno-flush-func.
+       (INITIALIZE_TRAMPOLINE): Use mips_cache_flush_func if nonzero.
+       * config/mips/mips.c (mips_cache_flush_func): New.
+       * doc/invoke.texi: Document the new options.
+
 2001-10-31  Hans-Peter Nilsson  <hp@axis.com>
 
        * config.gcc (cris-*-linux*, tm_file): Rearrange order.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 51a445304cd3fe11354140dd3fe2ff1cc16f350e..255bd5deaaf5554d51feaa9a6aecb62bf9424b38 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -262,6 +262,8 @@ int mips16_hard_float;
    avoid using up another bit in target_flags.  */
 const char *mips_entry_string;
 
+const char *mips_cache_flush_func = CACHE_FLUSH_FUNC;
+
 /* Whether we should entry and exit pseudo-ops in mips16 mode.  */
 int mips_entry;
 

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index f65789d2b491896393079dec246e9003fc3a69f4..4215d7952b362076288b2798a653501865023bab 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -163,6 +163,7 @@ extern const char *mips_abi_string; /* for -mabi={32,n32,64} */
 extern const char *mips_entry_string;  /* for -mentry */
 extern const char *mips_no_mips16_string;/* for -mno-mips16 */
 extern const char *mips_explicit_type_size_string;/* for -mexplicit-type-size */
+extern const char *mips_cache_flush_func;/* for -mflush-func= and -mno-flush-func */
 extern int mips_split_addresses;       /* perform high/lo_sum support */
 extern int dslots_load_total;          /* total # load related delay slots */
 extern int dslots_load_filled;         /* # filled load delay slots */
@@ -625,6 +626,10 @@ extern void                sbss_section PARAMS ((void));
       N_("Don't use MIPS16 instructions")},                            \
   { "explicit-type-size", &mips_explicit_type_size_string,             \
       NULL},                                                           \
+  { "no-flush-func", &mips_cache_flush_func,                           \
+      N_("Don't call any cache flush functions")},                     \
+  { "flush-func=", &mips_cache_flush_func,                             \
+      N_("Specify cache flush function")},                             \
 }
 
 /* This is meant to be redefined in the host dependent files.  */
@@ -2832,10 +2837,11 @@ typedef struct mips_args {
   /* Flush both caches.  We need to flush the data cache in case           \
      the system has a write-back cache.  */                                \
   /* ??? Should check the return value for errors.  */                     \
-  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, CACHE_FLUSH_FUNC),         \
-                    0, VOIDmode, 3, addr, Pmode,                           \
-                    GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
-                    GEN_INT (3), TYPE_MODE (integer_type_node));           \
+  if (mips_cache_flush_func && mips_cache_flush_func[0])                   \
+    emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func),   \
+                      0, VOIDmode, 3, addr, Pmode,                         \
+                      GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
+                      GEN_INT (3), TYPE_MODE (integer_type_node));         \
 }
 \f
 /* Addressing modes, and classification of registers for them.  */

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a6424320b3191cd327584b46c947932a7b2b6087..cfd3d5d1949541c3ff271d5b3dcdc708400c9da9 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -462,7 +462,7 @@ in the following sections.
 -m4650  -msingle-float  -mmad @gol
 -mstats  -EL  -EB  -G @var{num}  -nocpp @gol
 -mabi=32  -mabi=n32  -mabi=64  -mabi=eabi @gol
--mfix7000  -mno-crt0}
+-mfix7000  -mno-crt0 -mflush-func=@var{func} -mno-flush-func}
 
 @emph{i386 and x86-64 Options}
 @gccoptlist{
@@ -7431,6 +7431,17 @@ occurs in the following two instructions.
 @item -no-crt0
 @opindex no-crt0
 Do not include the default crt0.
+
+@item -mflush-func=@var{func}
+@itemx -mno-flush-func
+@opindex mflush-func
+Specifies the function to call to flush the I and D caches, or to not
+call any such function.  If called, the function must take the same
+arguments as the common @code{_flush_func()}, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches).  The default
+depends on the target gcc was configured for, but commonly is either
+@samp{_flush_func} or @samp{__cpu_flush}.
 @end table
 
 @ifset INTERNALS