]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: meson8b: correct uart_B and uart_C clock references
authorhfdevel@gmx.net <hfdevel@gmx.net>
Fri, 7 Apr 2023 14:36:25 +0000 (16:36 +0200)
committerNeil Armstrong <neil.armstrong@linaro.org>
Tue, 9 May 2023 07:40:42 +0000 (09:40 +0200)
With the current device tree for meson8b, uarts B (e.g. available on pins
8/10 on Odroid-C1) and C (pins 3/5 on Odroid-C1) do not work, because they
are relying on incorrect clocks. Change the references of pclk to the
correct CLKID, to allow use of the two uarts.

Fixes: 3375aa77135f ("ARM: dts: meson8b: Fix the UART device-tree schema validation")
Signed-off-by: Hans-Frieder Vogt <hfdevel@gmx.net>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/trinity-bf20bcb9-790b-4ab9-99e3-0831ef8257f4-1680878185420@3c-app-gmx-bap55
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm/boot/dts/meson8b.dtsi

index 5979209fe91ef3981b093b12dadb02bab33fd215..5198f5177c2c161c28292faaf4d995a7c6d5d112 100644 (file)
 
 &uart_B {
        compatible = "amlogic,meson8b-uart";
-       clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
+       clocks = <&xtal>, <&clkc CLKID_UART1>, <&clkc CLKID_CLK81>;
        clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_C {
        compatible = "amlogic,meson8b-uart";
-       clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
+       clocks = <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
        clock-names = "xtal", "pclk", "baud";
 };