Add instructions bdepg and bextg and corresponding builtins.
gcc/ChangeLog:
* config/s390/s390-builtins.def (s390_bdepg): Add.
(s390_bextg): Add.
* config/s390/s390-builtin-types.def: Update accordingly.
* config/s390/s390.md (UNSPEC_BDEPG): Add.
(UNSPEC_BEXTG): Add.
(bdepg): Add.
(bextg): Add.
DEF_FN_TYPE_2 (BT_FN_UINT_UV4SI_INT, BT_UINT, BT_UV4SI, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UINT_VOIDCONSTPTR_INT, BT_UINT, BT_VOIDCONSTPTR, BT_INT)
DEF_FN_TYPE_2 (BT_FN_ULONGLONG_UV2DI_INT, BT_ULONGLONG, BT_UV2DI, BT_INT)
+DEF_FN_TYPE_2 (BT_FN_ULONG_ULONG_ULONG, BT_ULONG, BT_ULONG, BT_ULONG)
DEF_FN_TYPE_2 (BT_FN_USHORT_UV8HI_INT, BT_USHORT, BT_UV8HI, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_INT, BT_UV16QI, BT_UCHAR, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_UCHAR, BT_UV16QI, BT_UCHAR, BT_UCHAR)
B_DEF (s390_vcfn, vcfn_v8hi, 0, B_NNPA, O2_U4, BT_FN_UV8HI_UV8HI_UINT)
B_DEF (s390_vcnf, vcnf_v8hi, 0, B_NNPA, O2_U4, BT_FN_UV8HI_UV8HI_UINT)
+
+/* arch 15 builtins */
+
+B_DEF (s390_bdepg, bdepg, 0, B_ARCH15, 0, BT_FN_ULONG_ULONG_ULONG)
+B_DEF (s390_bextg, bextg, 0, B_ARCH15, 0, BT_FN_ULONG_ULONG_ULONG)
; Byte-wise Population Count
UNSPEC_POPCNT
+ UNSPEC_BDEPG
+ UNSPEC_BEXTG
+
; Load FP Integer
UNSPEC_FPINT_FLOOR
UNSPEC_FPINT_BTRUNC
[(set_attr "op_type" "RIL")
(set_attr "z10prop" "z10_fwd_A1")])
+;
+; BIT DEPOSIT
+;
+
+(define_insn "bdepg"
+ [(set (match_operand:DI 0 "register_operand" "=d")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")
+ (match_operand:DI 2 "register_operand" "d")]
+ UNSPEC_BDEPG))]
+ "TARGET_ARCH15 && TARGET_64BIT"
+ "bdepg\t%0,%1,%2"
+ [(set_attr "op_type" "RRF")])
+
+;
+; BIT EXTRACT
+;
+
+(define_insn "bextg"
+ [(set (match_operand:DI 0 "register_operand" "=d")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "d")
+ (match_operand:DI 2 "register_operand" "d")]
+ UNSPEC_BEXTG))]
+ "TARGET_ARCH15 && TARGET_64BIT"
+ "bextg\t%0,%1,%2"
+ [(set_attr "op_type" "RRF")])
+
+
;
; extendsidi2 instruction pattern(s).
;