--- /dev/null
+From 2a9df204be0bbb896e087f00b9ee3fc559d5a608 Mon Sep 17 00:00:00 2001
+From: Robert Foss <robert.foss@linaro.org>
+Date: Tue, 13 Dec 2022 16:03:04 +0100
+Subject: drm/bridge: lt9611: Fix PLL being unable to lock
+
+From: Robert Foss <robert.foss@linaro.org>
+
+commit 2a9df204be0bbb896e087f00b9ee3fc559d5a608 upstream.
+
+This fixes PLL being unable to lock, and is derived from an equivalent
+downstream commit.
+
+Available LT9611 documentation does not list this register, neither does
+LT9611UXC (which is a different chip).
+
+This commit has been confirmed to fix HDMI output on DragonBoard 845c.
+
+Suggested-by: Amit Pundir <amit.pundir@linaro.org>
+Reviewed-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Robert Foss <robert.foss@linaro.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20221213150304.4189760-1-robert.foss@linaro.org
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/bridge/lontium-lt9611.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/bridge/lontium-lt9611.c
++++ b/drivers/gpu/drm/bridge/lontium-lt9611.c
+@@ -258,6 +258,7 @@ static int lt9611_pll_setup(struct lt961
+ { 0x8126, 0x55 },
+ { 0x8127, 0x66 },
+ { 0x8128, 0x88 },
++ { 0x812a, 0x20 },
+ };
+
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
drm-amd-display-clear-mst-topology-if-it-fails-to-resume.patch
drm-amdgpu-for-s0ix-skip-sdma-5.x-suspend-resume.patch
drm-amdgpu-skip-psp-suspend-for-imu-enabled-asics-mode2-reset.patch
+drm-bridge-lt9611-fix-pll-being-unable-to-lock.patch