ARM: dts: imx7ulp: Add CPU clock and OPP table support

Add missing CPU clock definitions and operating-points-v2 table for the
Cortex-A7 on i.MX7ULP to enable proper CPU frequency scaling and
integration with the cpufreq/OPP frameworks.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
index 880b9a4f32b0846a773dbf9ad30715c84ac2fda6..1355feda1aa72d88dcf56033dfdeaae631c108f8 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
@@ -41,6 +41,34 @@
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <0xf00>;
+                       clocks = <&smc1 IMX7ULP_CLK_ARM>,
+                                <&scg1 IMX7ULP_CLK_CORE>,
+                                <&scg1 IMX7ULP_CLK_SYS_SEL>,
+                                <&scg1 IMX7ULP_CLK_HSRUN_CORE>,
+                                <&scg1 IMX7ULP_CLK_HSRUN_SYS_SEL>,
+                                <&scg1 IMX7ULP_CLK_FIRC>;
+                       clock-names = "arm", "core", "scs_sel",
+                                     "hsrun_core", "hsrun_scs_sel",
+                                     "firc";
+                       operating-points-v2 = <&cpu0_opp_table>;
+               };
+       };
+
+       cpu0_opp_table: opp-table {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-500210000 {
+                       opp-hz = /bits/ 64 <500210000>;
+                       opp-microvolt = <1025000>;
+                       clock-latency-ns = <150000>;
+                       opp-suspend;
+               };
+
+               opp-720000000 {
+                       opp-hz = /bits/ 64 <720000000>;
+                       opp-microvolt = <1125000>;
+                       clock-latency-ns = <150000>;
                };
        };