-*- text -*-
-Changes in 2.42:
-
-* Added support for AMD znver5 processor (available from GNU Binutils 2.42 release).
+Changes in 2.42.1:
-* Add support for the AArch64 Scalable Vector Extension version 2.1 (SVE2.1).
+* The options to enable the AArch64 SVE2.1, SME2.1 and B16B16 extensions have
+ been disabled, because of a number of known issues with their implementation
+ in the 2.42 release.
-* Add support for the AArch64 Scalable Matrix Extension version 2.1 (SME2.1).
+Changes in 2.42:
-* Add support for the AArch64 BFloat16 to BFloat16 arithmetic for SVE2 and SME2
- (B16B16).
+* Added support for AMD znver5 processor (available from GNU Binutils 2.42 release).
* Add support for the AArch64 Reliability, Availability and Serviceability
extension v2 (RASv2).
{"ite", AARCH64_FEATURE (ITE), AARCH64_NO_FEATURES},
{"d128", AARCH64_FEATURE (D128),
AARCH64_FEATURE (LSE128)},
- {"b16b16", AARCH64_FEATURE (B16B16), AARCH64_FEATURE (SVE2)},
- {"sme2p1", AARCH64_FEATURE (SME2p1), AARCH64_FEATURE (SME2)},
- {"sve2p1", AARCH64_FEATURE (SVE2p1), AARCH64_FEATURE (SVE2)},
{"rcpc3", AARCH64_FEATURE (RCPC3), AARCH64_FEATURE (RCPC2)},
{NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
};
@headitem Extension @tab Depends upon @tab Description
@item @code{aes} @tab @code{simd}
@tab Enable the AES and PMULL cryptographic extensions.
-@item @code{b16b16} @tab @code{sve2}
- @tab Enable BFloat16 to BFloat16 arithmetic for SVE2 and SME2.
@item @code{bf16} @tab @code{fp}
@tab Enable BFloat16 extension.
@item @code{chk} @tab
@tab Enable SME I16I64 Extension.
@item @code{sme2} @tab @code{sme}
@tab Enable SME2.
-@item @code{sme2p1} @tab @code{sme2}
- @tab Enable SME2.1.
@item @code{ssbs} @tab
@tab Enable Speculative Store Bypassing Safe state read and write.
@item @code{sve} @tab @code{fcma}
@tab Enable the SVE2 SHA3 Extension.
@item @code{sve2-sm4} @tab @code{sve2}, @code{sm4}
@tab Enable the SVE2 SM4 Extension.
-@item @code{sve2p1} @tab @code{sve2}
- @tab Enable SVE2.1.
@item @code{the} @tab
@tab Enable the Translation Hardening Extension.
@item @code{tme} @tab
#name: Test of SVE2.1 and SME2.1 non-widening BFloat16 instructions.
#as: -march=armv9.4-a+b16b16
#objdump: -dr
+#xfail: *-*-*
[^:]+: file format .*
#name: Test of SME2.1 movaz instructions.
#as: -march=armv9.4-a+sme2p1
#objdump: -dr
+#xfail: *-*-*
[^:]+: file format .*
#name: Test of SVE2.1 min max instructions.
#as: -march=armv9.4-a+sve2p1
#objdump: -dr
+#xfail: *-*-*
[^:]+: file format .*