--- /dev/null
+From c6cc25fda58da8685ecef3f179adc7b99c8253b2 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Tue, 19 Feb 2013 11:51:22 +0100
+Subject: mfd: adp5520: Restore mode bits on resume
+
+From: Lars-Peter Clausen <lars@metafoo.de>
+
+commit c6cc25fda58da8685ecef3f179adc7b99c8253b2 upstream.
+
+The adp5520 unfortunately also clears the BL_EN bit when the nSTNDBY bit is
+cleared. So we need to make sure to restore it during resume if it was set
+before suspend.
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+Acked-by: Michael Hennerich <michael.hennerich@analog.com>
+Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mfd/adp5520.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/mfd/adp5520.c
++++ b/drivers/mfd/adp5520.c
+@@ -36,6 +36,7 @@ struct adp5520_chip {
+ struct blocking_notifier_head notifier_list;
+ int irq;
+ unsigned long id;
++ uint8_t mode;
+ };
+
+ static int __adp5520_read(struct i2c_client *client,
+@@ -326,7 +327,10 @@ static int adp5520_suspend(struct device
+ struct i2c_client *client = to_i2c_client(dev);
+ struct adp5520_chip *chip = dev_get_drvdata(&client->dev);
+
+- adp5520_clr_bits(chip->dev, ADP5520_MODE_STATUS, ADP5520_nSTNBY);
++ adp5520_read(chip->dev, ADP5520_MODE_STATUS, &chip->mode);
++ /* All other bits are W1C */
++ chip->mode &= ADP5520_BL_EN | ADP5520_DIM_EN | ADP5520_nSTNBY;
++ adp5520_write(chip->dev, ADP5520_MODE_STATUS, 0);
+ return 0;
+ }
+
+@@ -335,7 +339,7 @@ static int adp5520_resume(struct device
+ struct i2c_client *client = to_i2c_client(dev);
+ struct adp5520_chip *chip = dev_get_drvdata(&client->dev);
+
+- adp5520_set_bits(chip->dev, ADP5520_MODE_STATUS, ADP5520_nSTNBY);
++ adp5520_write(chip->dev, ADP5520_MODE_STATUS, chip->mode);
+ return 0;
+ }
+ #endif
--- /dev/null
+From 836dc2fe89c968c10cada87e0dfae6626f8f9da3 Mon Sep 17 00:00:00 2001
+From: Philip Rakity <prakity@yahoo.com>
+Date: Thu, 4 Apr 2013 20:18:11 +0100
+Subject: mmc: core: Fix bit width test failing on old eMMC cards
+
+From: Philip Rakity <prakity@yahoo.com>
+
+commit 836dc2fe89c968c10cada87e0dfae6626f8f9da3 upstream.
+
+PARTITION_SUPPORT needs to be set before doing the compare on version
+number so the bit width test does not get invalid data. Before this
+patch, a Sandisk iNAND eMMC card would detect 1-bit width although
+the hardware supports 4-bit.
+
+Only affects old emmc devices - pre 4.4 devices.
+
+Reported-by: Elad Yi <elad.yi@gmail.com>
+Signed-off-by: Philip Rakity <prakity@yahoo.com>
+Signed-off-by: Chris Ball <cjb@laptop.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/mmc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -353,13 +353,13 @@ static int mmc_read_ext_csd(struct mmc_c
+ ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT];
+ card->ext_csd.raw_trim_mult =
+ ext_csd[EXT_CSD_TRIM_MULT];
++ card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT];
+ if (card->ext_csd.rev >= 4) {
+ /*
+ * Enhanced area feature support -- check whether the eMMC
+ * card has the Enhanced area enabled. If so, export enhanced
+ * area offset and size to user by adding sysfs interface.
+ */
+- card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT];
+ if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) &&
+ (ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) {
+ u8 hc_erase_grp_sz =
wireless-regulatory-fix-channel-disabling-race-condition.patch
ipc-sysv-shared-memory-limited-to-8tib.patch
ext4-fix-kconfig-documentation-for-config_ext4_debug.patch
+x86-eliminate-irq_mis_count-counted-in-arch_irq_stat.patch
+mmc-core-fix-bit-width-test-failing-on-old-emmc-cards.patch
+mfd-adp5520-restore-mode-bits-on-resume.patch
--- /dev/null
+From f7b0e1055574ce06ab53391263b4e205bf38daf3 Mon Sep 17 00:00:00 2001
+From: Li Fei <fei.li@intel.com>
+Date: Fri, 26 Apr 2013 20:50:11 +0800
+Subject: x86: Eliminate irq_mis_count counted in arch_irq_stat
+
+From: Li Fei <fei.li@intel.com>
+
+commit f7b0e1055574ce06ab53391263b4e205bf38daf3 upstream.
+
+With the current implementation, kstat_cpu(cpu).irqs_sum is also
+increased in case of irq_mis_count increment.
+
+So there is no need to count irq_mis_count in arch_irq_stat,
+otherwise irq_mis_count will be counted twice in the sum of
+/proc/stat.
+
+Reported-by: Liu Chuansheng <chuansheng.liu@intel.com>
+Signed-off-by: Li Fei <fei.li@intel.com>
+Acked-by: Liu Chuansheng <chuansheng.liu@intel.com>
+Cc: tomoki.sekiyama.qu@hitachi.com
+Cc: joe@perches.com
+Link: http://lkml.kernel.org/r/1366980611.32469.7.camel@fli24-HP-Compaq-8100-Elite-CMT-PC
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/irq.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/arch/x86/kernel/irq.c
++++ b/arch/x86/kernel/irq.c
+@@ -159,10 +159,6 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
+ u64 arch_irq_stat(void)
+ {
+ u64 sum = atomic_read(&irq_err_count);
+-
+-#ifdef CONFIG_X86_IO_APIC
+- sum += atomic_read(&irq_mis_count);
+-#endif
+ return sum;
+ }
+