--- /dev/null
+From stable-bounces@linux.kernel.org Mon Dec 11 13:26:59 2006
+From: Arjan van de Ven <arjan@linux.intel.com>
+To: stable@kernel.org
+Date: Mon, 11 Dec 2006 21:45:01 +0100
+Message-Id: <1165869901.27217.439.camel@laptopd505.fenrus.org>
+Subject: x86-64: Mark rdtsc as sync only for netburst, not for core2
+
+On the Core2 cpus, the rdtsc instruction is not serializing (as defined
+in the architecture reference since rdtsc exists) and due to the deep
+speculation of these cores, it's possible that you can observe time go
+backwards between cores due to this speculation. Since the kernel
+already deals with this with the SYNC_RDTSC flag, the solution is
+simple, only assume that the instruction is serializing on family 15...
+
+The price one pays for this is a slightly slower gettimeofday (by a
+dozen or two cycles), but that increase is quite small to pay for a
+really-going-forward tsc counter.
+
+Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
+Signed-off-by: Andi Kleen <ak@suse.de>
+[chrisw: backported to 2.6.18]
+Signed-off-by: Chris Wright <chrisw@sous-sol.org>
+---
+Commit: f3d73707a1e84f0687a05144b70b660441e999c7
+Author: Arjan van de Ven <arjan@linux.intel.com>
+Date: Thu Dec 7 02:14:12 2006 +0100
+
+ arch/x86_64/kernel/setup.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- linux-2.6.18.5.orig/arch/x86_64/kernel/setup.c
++++ linux-2.6.18.5/arch/x86_64/kernel/setup.c
+@@ -1010,7 +1010,10 @@ static void __cpuinit init_intel(struct
+ if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
+ (c->x86 == 0x6 && c->x86_model >= 0x0e))
+ set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
+- set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
++ if (c->x86 == 15)
++ set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
++ else
++ clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
+ c->x86_max_cores = intel_num_cpu_cores(c);
+
+ srat_detect_node();