Add support for BFD_RELOC_{ARM|THUMB}_PCREL_BLX relocs.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c6467bafd082f960dba314735645d90663763514..6d19a08db461fe9da9053bd7acd1268bd6d66d7f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2000-04-07  Nick Clifton  <nickc@cygnus.com>
+
+       * config/tc-arm.c (md_apply_fix3): Treat BFD_RELOC_ARM_PCREL_BLX
+       in the same way as BFD_RELOC_ARM_PCREL_BRANCH, and
+       BFD_RELOC_THUMB_PCREL_BLX lie BFD_RELOC_THUMB_PCREL_BRANCH.
+       (tc_gen_reloc): Accept BFD_RELOC_{ARM|THUMB}_PCREL_BLX.
+       (arm_force_relocation): Force relocations for
+       BFD_RELOC_{ARM|THUMB}_PCREL_BLX as well.
+
 Wed Apr  5 22:26:32 2000  J"orn Rennecke <amylaar@cygnus.co.uk>
 
        * config/tc-sh.c (get_operands): There's no third operand if the

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 4779b3db85f6d19fef9c0bb50ac3ac5a502c6208..53c6b2fd201be8dfe73a5d908645178ef96c4298 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -2661,8 +2661,8 @@ do_adr (str, flags)
   inst.reloc.exp.X_add_number -= 8; /* PC relative adjust.  */
   inst.reloc.pc_rel = 1;
   inst.instruction |= flags;
+  
   end_of_line (str);
-  return;
 }
 
 static void
@@ -5370,6 +5370,7 @@ md_apply_fix3 (fixP, val, seg)
        {
          if (target_oabi
              && (fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH
+               || fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BLX
                ))
            value = 0;
          else
@@ -5617,6 +5618,22 @@ md_apply_fix3 (fixP, val, seg)
       md_number_to_chars (buf, newval, INSN_SIZE);
       break;
 
+    case BFD_RELOC_ARM_PCREL_BLX:
+      {
+       offsetT hbit;
+       newval = md_chars_to_number (buf, INSN_SIZE);
+
+#ifdef OBJ_ELF
+       if (! target_oabi)
+           value = fixP->fx_offset;
+#endif
+       hbit   = (value >> 1) & 1;
+       value  = (value >> 2) & 0x00ffffff;
+       value  = (value + (newval & 0x00ffffff)) & 0x00ffffff;
+       newval = value | (newval & 0xfe000000) | (hbit << 24);
+       md_number_to_chars (buf, newval, INSN_SIZE);
+      }
+      break;
 
     case BFD_RELOC_THUMB_PCREL_BRANCH9: /* conditional branch */
       newval = md_chars_to_number (buf, THUMB_SIZE);
@@ -5650,6 +5667,7 @@ md_apply_fix3 (fixP, val, seg)
       md_number_to_chars (buf, newval, THUMB_SIZE);
       break;
 
+    case BFD_RELOC_THUMB_PCREL_BLX:
     case BFD_RELOC_THUMB_PCREL_BRANCH23:
       {
         offsetT newval2;
@@ -5956,10 +5974,12 @@ tc_gen_reloc (section, fixp)
        }
 
     case BFD_RELOC_ARM_PCREL_BRANCH:
+    case BFD_RELOC_ARM_PCREL_BLX:
     case BFD_RELOC_RVA:      
     case BFD_RELOC_THUMB_PCREL_BRANCH9:
     case BFD_RELOC_THUMB_PCREL_BRANCH12:
     case BFD_RELOC_THUMB_PCREL_BRANCH23:
+    case BFD_RELOC_THUMB_PCREL_BLX:
     case BFD_RELOC_VTABLE_ENTRY:
     case BFD_RELOC_VTABLE_INHERIT:
       code = fixp->fx_r_type;
@@ -6172,10 +6192,12 @@ md_assemble (str)
         keep trying with progressively smaller basic instructions until one
         matches, or we run out of opcode.  */
       q = (p - str > LONGEST_INST) ? str + LONGEST_INST : p;
+
       for (; q != str; q--)
        {
          c = *q;
          *q = '\0';
+
          opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str);
          *q = c;
          
@@ -7102,6 +7124,8 @@ arm_force_relocation (fixp)
   if (   fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
       || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
       || fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH
+      || fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BLX
+      || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX
       || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23)    
     return 1;