mstp1_clks: mstp1_clks@e6150134 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+                       clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
                                 <&zs_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
+                               R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
                                R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
                                R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
                        >;
                        clock-output-names =
-                               "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+                               "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
                                "vsp1-du0", "vsp1-rt", "vsp1-sy";
                };
                mstp2_clks: mstp2_clks@e6150138 {