neon.ml (ops): Fix regexp for vld1Q_dups64 and vld1Q_dupu64 tests.

2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
	vld1Q_dupu64 tests.

2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
	* gcc.target/arm/neon/vld1Q_dups64.c: Likewise.

From-SVN: r189884

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c0550c5b6e7a23571e339c03f5548938e6dec1ee..55075a407e159b8955a686ce4d584fc06c04fc0f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       * config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
+       vld1Q_dupu64 tests.
+
 2012-07-26  Oleg Endo  <olegendo@gcc.gnu.org>
 
        PR target/51244

diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml
index 24829f2d5014352acecbb6593afe77c115cc7ed0..56869c03c4028bca99270b0902cb8b76cd93c083 100644 (file)
--- a/gcc/config/arm/neon.ml
+++ b/gcc/config/arm/neon.ml
@@ -1445,8 +1445,10 @@ let ops =
                                         CstPtrTo Corereg |]]],
       Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
       bits_1, pf_su_8_32;
+    (* Treated identically to vld1_dup above as we now
+       do a single load followed by a duplicate.  *)
     Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (2, Dreg);
+      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
                                         CstPtrTo Corereg |]]],
       Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
       bits_1, [S64; U64];

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 254bf802d8da2f5e5364ceaf232056f0466159f9..bc12992365cc734f4c666424bbf5c757295ee935 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+       * gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
+       * gcc.target/arm/neon/vld1Q_dups64.c: Likewise.
+
 2012-07-26  Mikael Morin  <mikael@gcc.gnu.org>
 
        PR fortran/44354

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
index 912b93d1d6c6e352d93dfa21dc775c7494095487..4fceee82eda7e4cfbbd04032bb2a7c14440a788f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
@@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void)
   out_int64x2_t = vld1q_dup_s64 (0);
 }
 
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
 /* { dg-final { cleanup-saved-temps } } */

diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
index 234db407b37061f18f5be57dd2d195a5f1c63a51..ef0a3828c3e39b37897d6295882fc0b6c964eaa4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
@@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void)
   out_uint64x2_t = vld1q_dup_u64 (0);
 }
 
-/* { dg-final { scan-assembler "vld1\.64\[     \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[       \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[     \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
 /* { dg-final { cleanup-saved-temps } } */