]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: errata: Enable the AC03_CPU_38 workaround for ampere1a
authorD Scott Phillips <scott@os.amperecomputing.com>
Tue, 27 Aug 2024 21:17:01 +0000 (14:17 -0700)
committerWill Deacon <will@kernel.org>
Fri, 30 Aug 2024 13:22:12 +0000 (14:22 +0100)
The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same
bug as AC03_CPU_38. Add ampere1a to the AC03_CPU_38 workaround midr list.

Cc: <stable@vger.kernel.org>
Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com>
Acked-by: Oliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20240827211701.2216719-1-scott@os.amperecomputing.com
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/include/asm/cputype.h
arch/arm64/kernel/cpu_errata.c

index 50327c05be8d1b77fc7af27c695dbb97740cbca1..39c52385f11fb3abb6ca3afdd2074c63d0caf319 100644 (file)
@@ -55,6 +55,8 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | Ampere         | AmpereOne       | AC03_CPU_38     | AMPERE_ERRATUM_AC03_CPU_38  |
 +----------------+-----------------+-----------------+-----------------------------+
+| Ampere         | AmpereOne AC04  | AC04_CPU_10     | AMPERE_ERRATUM_AC03_CPU_38  |
++----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A510     | #2457168        | ARM64_ERRATUM_2457168       |
 +----------------+-----------------+-----------------+-----------------------------+
index a2f8ff354ca670af50e44c790c6c201b63aa0ddb..c8cba20a4d11b2c524ca597f0cdf47e75d7a8b40 100644 (file)
@@ -423,7 +423,7 @@ config AMPERE_ERRATUM_AC03_CPU_38
        default y
        help
          This option adds an alternative code sequence to work around Ampere
-         erratum AC03_CPU_38 on AmpereOne.
+         errata AC03_CPU_38 and AC04_CPU_10 on AmpereOne.
 
          The affected design reports FEAT_HAFDBS as not implemented in
          ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0
index 5fd7caea441936246ce9ddb7b5d7bdf04b30d14b..5a7dfeb8e8eb55da537605fd841cc50992009509 100644 (file)
 #define APPLE_CPU_PART_M2_AVALANCHE_MAX        0x039
 
 #define AMPERE_CPU_PART_AMPERE1                0xAC3
+#define AMPERE_CPU_PART_AMPERE1A       0xAC4
 
 #define MICROSOFT_CPU_PART_AZURE_COBALT_100    0xD49 /* Based on r0p0 of ARM Neoverse N2 */
 
 #define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)
 #define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)
 #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)
+#define MIDR_AMPERE1A MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1A)
 #define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_AZURE_COBALT_100)
 
 /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
index f6b6b4507357158c8e3a26881f7ceca1cdd20646..dfefbdf4073a6a22ced7d89e5a10f56f1bc61b89 100644 (file)
@@ -456,6 +456,14 @@ static const struct midr_range erratum_spec_ssbs_list[] = {
 };
 #endif
 
+#ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38
+static const struct midr_range erratum_ac03_cpu_38_list[] = {
+       MIDR_ALL_VERSIONS(MIDR_AMPERE1),
+       MIDR_ALL_VERSIONS(MIDR_AMPERE1A),
+       {},
+};
+#endif
+
 const struct arm64_cpu_capabilities arm64_errata[] = {
 #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE
        {
@@ -772,7 +780,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
        {
                .desc = "AmpereOne erratum AC03_CPU_38",
                .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38,
-               ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1),
+               ERRATA_MIDR_RANGE_LIST(erratum_ac03_cpu_38_list),
        },
 #endif
        {