]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
3.18-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 16 Oct 2018 13:08:11 +0000 (15:08 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 16 Oct 2018 13:08:11 +0000 (15:08 +0200)
added patches:
mach64-detect-the-dot-clock-divider-correctly-on-sparc.patch
mm-preserve-_page_devmap-across-mprotect-calls.patch

queue-3.18/mach64-detect-the-dot-clock-divider-correctly-on-sparc.patch [new file with mode: 0644]
queue-3.18/mm-preserve-_page_devmap-across-mprotect-calls.patch [new file with mode: 0644]
queue-3.18/series

diff --git a/queue-3.18/mach64-detect-the-dot-clock-divider-correctly-on-sparc.patch b/queue-3.18/mach64-detect-the-dot-clock-divider-correctly-on-sparc.patch
new file mode 100644 (file)
index 0000000..cd4834f
--- /dev/null
@@ -0,0 +1,135 @@
+From 76ebebd2464c5c8a4453c98b6dbf9c95a599e810 Mon Sep 17 00:00:00 2001
+From: Mikulas Patocka <mpatocka@redhat.com>
+Date: Fri, 17 Aug 2018 15:19:37 -0400
+Subject: mach64: detect the dot clock divider correctly on sparc
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mikulas Patocka <mpatocka@redhat.com>
+
+commit 76ebebd2464c5c8a4453c98b6dbf9c95a599e810 upstream.
+
+On Sun Ultra 5, it happens that the dot clock is not set up properly for
+some videomodes. For example, if we set the videomode "r1024x768x60" in
+the firmware, Linux would incorrectly set a videomode with refresh rate
+180Hz when booting (suprisingly, my LCD monitor can display it, although
+display quality is very low).
+
+The reason is this: Older mach64 cards set the divider in the register
+VCLK_POST_DIV. The register has four 2-bit fields (the field that is
+actually used is specified in the lowest two bits of the register
+CLOCK_CNTL). The 2 bits select divider "1, 2, 4, 8". On newer mach64 cards,
+there's another bit added - the top four bits of PLL_EXT_CNTL extend the
+divider selection, so we have possible dividers "1, 2, 4, 8, 3, 5, 6, 12".
+The Linux driver clears the top four bits of PLL_EXT_CNTL and never sets
+them, so it can work regardless if the card supports them. However, the
+sparc64 firmware may set these extended dividers during boot - and the
+mach64 driver detects incorrect dot clock in this case.
+
+This patch makes the driver read the additional divider bit from
+PLL_EXT_CNTL and calculate the initial refresh rate properly.
+
+Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
+Cc: stable@vger.kernel.org
+Acked-by: David S. Miller <davem@davemloft.net>
+Reviewed-by: Ville Syrjälä <syrjala@sci.fi>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/video/fbdev/aty/atyfb.h      |    3 ++-
+ drivers/video/fbdev/aty/atyfb_base.c |    7 ++++---
+ drivers/video/fbdev/aty/mach64_ct.c  |   10 +++++-----
+ 3 files changed, 11 insertions(+), 9 deletions(-)
+
+--- a/drivers/video/fbdev/aty/atyfb.h
++++ b/drivers/video/fbdev/aty/atyfb.h
+@@ -335,6 +335,8 @@ extern const struct aty_pll_ops aty_pll_
+ extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
+ extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);
++extern const u8 aty_postdividers[8];
++
+     /*
+      *  Hardware cursor support
+@@ -361,7 +363,6 @@ static inline void wait_for_idle(struct
+ extern void aty_reset_engine(const struct atyfb_par *par);
+ extern void aty_init_engine(struct atyfb_par *par, struct fb_info *info);
+-extern u8   aty_ld_pll_ct(int offset, const struct atyfb_par *par);
+ void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
+ void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+--- a/drivers/video/fbdev/aty/atyfb_base.c
++++ b/drivers/video/fbdev/aty/atyfb_base.c
+@@ -3112,17 +3112,18 @@ static int atyfb_setup_sparc(struct pci_
+               /*
+                * PLL Reference Divider M:
+                */
+-              M = pll_regs[2];
++              M = pll_regs[PLL_REF_DIV];
+               /*
+                * PLL Feedback Divider N (Dependent on CLOCK_CNTL):
+                */
+-              N = pll_regs[7 + (clock_cntl & 3)];
++              N = pll_regs[VCLK0_FB_DIV + (clock_cntl & 3)];
+               /*
+                * PLL Post Divider P (Dependent on CLOCK_CNTL):
+                */
+-              P = 1 << (pll_regs[6] >> ((clock_cntl & 3) << 1));
++              P = aty_postdividers[((pll_regs[VCLK_POST_DIV] >> ((clock_cntl & 3) << 1)) & 3) |
++                                   ((pll_regs[PLL_EXT_CNTL] >> (2 + (clock_cntl & 3))) & 4)];
+               /*
+                * PLL Divider Q:
+--- a/drivers/video/fbdev/aty/mach64_ct.c
++++ b/drivers/video/fbdev/aty/mach64_ct.c
+@@ -114,7 +114,7 @@ static void aty_st_pll_ct(int offset, u8
+  */
+ #define Maximum_DSP_PRECISION 7
+-static u8 postdividers[] = {1,2,4,8,3};
++const u8 aty_postdividers[8] = {1,2,4,8,3,5,6,12};
+ static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll)
+ {
+@@ -221,7 +221,7 @@ static int aty_valid_pll_ct(const struct
+               pll->vclk_post_div += (q <  64*8);
+               pll->vclk_post_div += (q <  32*8);
+       }
+-      pll->vclk_post_div_real = postdividers[pll->vclk_post_div];
++      pll->vclk_post_div_real = aty_postdividers[pll->vclk_post_div];
+       //    pll->vclk_post_div <<= 6;
+       pll->vclk_fb_div = q * pll->vclk_post_div_real / 8;
+       pllvclk = (1000000 * 2 * pll->vclk_fb_div) /
+@@ -512,7 +512,7 @@ static int aty_init_pll_ct(const struct
+               u8 mclk_fb_div, pll_ext_cntl;
+               pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par);
+               pll_ext_cntl = aty_ld_pll_ct(PLL_EXT_CNTL, par);
+-              pll->ct.xclk_post_div_real = postdividers[pll_ext_cntl & 0x07];
++              pll->ct.xclk_post_div_real = aty_postdividers[pll_ext_cntl & 0x07];
+               mclk_fb_div = aty_ld_pll_ct(MCLK_FB_DIV, par);
+               if (pll_ext_cntl & PLL_MFB_TIMES_4_2B)
+                       mclk_fb_div <<= 1;
+@@ -534,7 +534,7 @@ static int aty_init_pll_ct(const struct
+               xpost_div += (q <  64*8);
+               xpost_div += (q <  32*8);
+       }
+-      pll->ct.xclk_post_div_real = postdividers[xpost_div];
++      pll->ct.xclk_post_div_real = aty_postdividers[xpost_div];
+       pll->ct.mclk_fb_div = q * pll->ct.xclk_post_div_real / 8;
+ #ifdef CONFIG_PPC
+@@ -583,7 +583,7 @@ static int aty_init_pll_ct(const struct
+                       mpost_div += (q <  64*8);
+                       mpost_div += (q <  32*8);
+               }
+-              sclk_post_div_real = postdividers[mpost_div];
++              sclk_post_div_real = aty_postdividers[mpost_div];
+               pll->ct.sclk_fb_div = q * sclk_post_div_real / 8;
+               pll->ct.spll_cntl2 = mpost_div << 4;
+ #ifdef DEBUG
diff --git a/queue-3.18/mm-preserve-_page_devmap-across-mprotect-calls.patch b/queue-3.18/mm-preserve-_page_devmap-across-mprotect-calls.patch
new file mode 100644 (file)
index 0000000..da5ad64
--- /dev/null
@@ -0,0 +1,85 @@
+From 4628a64591e6cee181237060961e98c615c33966 Mon Sep 17 00:00:00 2001
+From: Jan Kara <jack@suse.cz>
+Date: Tue, 9 Oct 2018 12:19:17 +0200
+Subject: mm: Preserve _PAGE_DEVMAP across mprotect() calls
+
+From: Jan Kara <jack@suse.cz>
+
+commit 4628a64591e6cee181237060961e98c615c33966 upstream.
+
+Currently _PAGE_DEVMAP bit is not preserved in mprotect(2) calls. As a
+result we will see warnings such as:
+
+BUG: Bad page map in process JobWrk0013  pte:800001803875ea25 pmd:7624381067
+addr:00007f0930720000 vm_flags:280000f9 anon_vma:          (null) mapping:ffff97f2384056f0 index:0
+file:457-000000fe00000030-00000009-000000ca-00000001_2001.fileblock fault:xfs_filemap_fault [xfs] mmap:xfs_file_mmap [xfs] readpage:          (null)
+CPU: 3 PID: 15848 Comm: JobWrk0013 Tainted: G        W          4.12.14-2.g7573215-default #1 SLE12-SP4 (unreleased)
+Hardware name: Intel Corporation S2600WFD/S2600WFD, BIOS SE5C620.86B.01.00.0833.051120182255 05/11/2018
+Call Trace:
+ dump_stack+0x5a/0x75
+ print_bad_pte+0x217/0x2c0
+ ? enqueue_task_fair+0x76/0x9f0
+ _vm_normal_page+0xe5/0x100
+ zap_pte_range+0x148/0x740
+ unmap_page_range+0x39a/0x4b0
+ unmap_vmas+0x42/0x90
+ unmap_region+0x99/0xf0
+ ? vma_gap_callbacks_rotate+0x1a/0x20
+ do_munmap+0x255/0x3a0
+ vm_munmap+0x54/0x80
+ SyS_munmap+0x1d/0x30
+ do_syscall_64+0x74/0x150
+ entry_SYSCALL_64_after_hwframe+0x3d/0xa2
+...
+
+when mprotect(2) gets used on DAX mappings. Also there is a wide variety
+of other failures that can result from the missing _PAGE_DEVMAP flag
+when the area gets used by get_user_pages() later.
+
+Fix the problem by including _PAGE_DEVMAP in a set of flags that get
+preserved by mprotect(2).
+
+Fixes: 69660fd797c3 ("x86, mm: introduce _PAGE_DEVMAP")
+Fixes: ebd31197931d ("powerpc/mm: Add devmap support for ppc64")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Jan Kara <jack@suse.cz>
+Acked-by: Michal Hocko <mhocko@suse.com>
+Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
+index 2fdc865ca374..2a2486526d1f 100644
+--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
++++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
+@@ -114,7 +114,7 @@
+  */
+ #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
+                        _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
+-                       _PAGE_SOFT_DIRTY)
++                       _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
+ /*
+  * user access blocked by key
+  */
+@@ -132,7 +132,7 @@
+  */
+ #define _PAGE_CHG_MASK        (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
+                        _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE |   \
+-                       _PAGE_SOFT_DIRTY)
++                       _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
+ #define H_PTE_PKEY  (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
+                    H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
+diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
+index b64acb08a62b..106b7d0e2dae 100644
+--- a/arch/x86/include/asm/pgtable_types.h
++++ b/arch/x86/include/asm/pgtable_types.h
+@@ -124,7 +124,7 @@
+  */
+ #define _PAGE_CHG_MASK        (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |         \
+                        _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
+-                       _PAGE_SOFT_DIRTY)
++                       _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
+ #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
+ /*
index a6d45315d40ebd3cfeb4bb218fc91e94140ee80e..055e4e3bb5c147ed4d5a07a06633662d32fd5233 100644 (file)
@@ -1,3 +1,5 @@
 selftests-efivarfs-add-required-kernel-configs.patch
 mfd-omap-usb-host-fix-dts-probe-of-children.patch
 stmmac-fix-valid-numbers-of-unicast-filter-entries.patch
+mach64-detect-the-dot-clock-divider-correctly-on-sparc.patch
+mm-preserve-_page_devmap-across-mprotect-calls.patch