--- /dev/null
+From 16dd2825c23530f2259fc671960a3a65d2af69bd Mon Sep 17 00:00:00 2001
+From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Date: Tue, 5 Nov 2024 08:40:23 -0700
+Subject: drm/amd/display: Adjust VSDB parser for replay feature
+
+From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+
+commit 16dd2825c23530f2259fc671960a3a65d2af69bd upstream.
+
+At some point, the IEEE ID identification for the replay check in the
+AMD EDID was added. However, this check causes the following
+out-of-bounds issues when using KASAN:
+
+[ 27.804016] BUG: KASAN: slab-out-of-bounds in amdgpu_dm_update_freesync_caps+0xefa/0x17a0 [amdgpu]
+[ 27.804788] Read of size 1 at addr ffff8881647fdb00 by task systemd-udevd/383
+
+...
+
+[ 27.821207] Memory state around the buggy address:
+[ 27.821215] ffff8881647fda00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+[ 27.821224] ffff8881647fda80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+[ 27.821234] >ffff8881647fdb00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
+[ 27.821243] ^
+[ 27.821250] ffff8881647fdb80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
+[ 27.821259] ffff8881647fdc00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+[ 27.821268] ==================================================================
+
+This is caused because the ID extraction happens outside of the range of
+the edid lenght. This commit addresses this issue by considering the
+amd_vsdb_block size.
+
+Cc: ChiaHsuan Chung <chiahsuan.chung@amd.com>
+Reviewed-by: Leo Li <sunpeng.li@amd.com>
+Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
+Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit b7e381b1ccd5e778e3d9c44c669ad38439a861d8)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -12038,7 +12038,7 @@ static int parse_amd_vsdb(struct amdgpu_
+ break;
+ }
+
+- while (j < EDID_LENGTH) {
++ while (j < EDID_LENGTH - sizeof(struct amd_vsdb_block)) {
+ struct amd_vsdb_block *amd_vsdb = (struct amd_vsdb_block *)&edid_ext[j];
+ unsigned int ieeeId = (amd_vsdb->ieee_id[2] << 16) | (amd_vsdb->ieee_id[1] << 8) | (amd_vsdb->ieee_id[0]);
+
--- /dev/null
+From 4bb2f52ac01b8d45d64c7c04881207722e5e6fe4 Mon Sep 17 00:00:00 2001
+From: Hamish Claxton <hamishclaxton@gmail.com>
+Date: Tue, 5 Nov 2024 10:42:31 +1000
+Subject: drm/amd/display: Fix failure to read vram info due to static BP_RESULT
+
+From: Hamish Claxton <hamishclaxton@gmail.com>
+
+commit 4bb2f52ac01b8d45d64c7c04881207722e5e6fe4 upstream.
+
+The static declaration causes the check to fail. Remove it.
+
+Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3678
+Fixes: 00c391102abc ("drm/amd/display: Add misc DC changes for DCN401")
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Hamish Claxton <hamishclaxton@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: aurabindo.pillai@amd.com
+Cc: hamishclaxton@gmail.com
+(cherry picked from commit 91314e7dfd83345b8b820b782b2511c9c32866cd)
+Cc: stable@vger.kernel.org # 6.11.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+index be8fbb04ad98..902491669cbc 100644
+--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
++++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+@@ -3122,7 +3122,7 @@ static enum bp_result bios_parser_get_vram_info(
+ struct dc_vram_info *info)
+ {
+ struct bios_parser *bp = BP_FROM_DCB(dcb);
+- static enum bp_result result = BP_RESULT_BADBIOSTABLE;
++ enum bp_result result = BP_RESULT_BADBIOSTABLE;
+ struct atom_common_table_header *header;
+ struct atom_data_revision revision;
+
+--
+2.47.0
+
--- /dev/null
+From 6825cb07b79ffeb1d90ffaa7a1227462cdca34ae Mon Sep 17 00:00:00 2001
+From: Ryan Seto <ryanseto@amd.com>
+Date: Fri, 1 Nov 2024 10:19:56 -0400
+Subject: drm/amd/display: Handle dml allocation failure to avoid crash
+
+From: Ryan Seto <ryanseto@amd.com>
+
+commit 6825cb07b79ffeb1d90ffaa7a1227462cdca34ae upstream.
+
+[Why]
+In the case where a dml allocation fails for any reason, the
+current state's dml contexts would no longer be valid. Then
+subsequent calls dc_state_copy_internal would shallow copy
+invalid memory and if the new state was released, a double
+free would occur.
+
+[How]
+Reset dml pointers in new_state to NULL and avoid invalid
+pointer
+
+Reviewed-by: Dillon Varone <dillon.varone@amd.com>
+Signed-off-by: Ryan Seto <ryanseto@amd.com>
+Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit bcafdc61529a48f6f06355d78eb41b3aeda5296c)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/core/dc_state.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
+@@ -265,6 +265,9 @@ struct dc_state *dc_state_create_copy(st
+ dc_state_copy_internal(new_state, src_state);
+
+ #ifdef CONFIG_DRM_AMD_DC_FP
++ new_state->bw_ctx.dml2 = NULL;
++ new_state->bw_ctx.dml2_dc_power_source = NULL;
++
+ if (src_state->bw_ctx.dml2 &&
+ !dml2_create_copy(&new_state->bw_ctx.dml2, src_state->bw_ctx.dml2)) {
+ dc_state_release(new_state);
--- /dev/null
+From 9fc0cbcb6e45d6fc96ffd3bb7b6d6d28d693ff4d Mon Sep 17 00:00:00 2001
+From: Dillon Varone <dillon.varone@amd.com>
+Date: Fri, 1 Nov 2024 12:00:14 -0400
+Subject: drm/amd/display: Require minimum VBlank size for stutter optimization
+
+From: Dillon Varone <dillon.varone@amd.com>
+
+commit 9fc0cbcb6e45d6fc96ffd3bb7b6d6d28d693ff4d upstream.
+
+If the nominal VBlank is too small, optimizing for stutter can cause
+the prefetch bandwidth to increase drasticaly, resulting in higher
+clock and power requirements. Only optimize if it is >3x the stutter
+latency.
+
+Reviewed-by: Austin Zheng <austin.zheng@amd.com>
+Signed-off-by: Dillon Varone <dillon.varone@amd.com>
+Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 003215f962cdf2265f126a3f4c9ad20917f87fca)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 11 ++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
++++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
+@@ -30,6 +30,7 @@
+ #include "dml2_pmo_dcn4_fams2.h"
+
+ static const double MIN_VACTIVE_MARGIN_PCT = 0.25; // We need more than non-zero margin because DET buffer granularity can alter vactive latency hiding
++static const double MIN_BLANK_STUTTER_FACTOR = 3.0;
+
+ static const enum dml2_pmo_pstate_strategy base_strategy_list_1_display[][PMO_DCN4_MAX_DISPLAYS] = {
+ // VActive Preferred
+@@ -2004,6 +2005,7 @@ bool pmo_dcn4_fams2_init_for_stutter(str
+ struct dml2_pmo_instance *pmo = in_out->instance;
+ bool stutter_period_meets_z8_eco = true;
+ bool z8_stutter_optimization_too_expensive = false;
++ bool stutter_optimization_too_expensive = false;
+ double line_time_us, vblank_nom_time_us;
+
+ unsigned int i;
+@@ -2025,10 +2027,15 @@ bool pmo_dcn4_fams2_init_for_stutter(str
+ line_time_us = (double)in_out->base_display_config->display_config.stream_descriptors[i].timing.h_total / (in_out->base_display_config->display_config.stream_descriptors[i].timing.pixel_clock_khz * 1000) * 1000000;
+ vblank_nom_time_us = line_time_us * in_out->base_display_config->display_config.stream_descriptors[i].timing.vblank_nom;
+
+- if (vblank_nom_time_us < pmo->soc_bb->power_management_parameters.z8_stutter_exit_latency_us) {
++ if (vblank_nom_time_us < pmo->soc_bb->power_management_parameters.z8_stutter_exit_latency_us * MIN_BLANK_STUTTER_FACTOR) {
+ z8_stutter_optimization_too_expensive = true;
+ break;
+ }
++
++ if (vblank_nom_time_us < pmo->soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us * MIN_BLANK_STUTTER_FACTOR) {
++ stutter_optimization_too_expensive = true;
++ break;
++ }
+ }
+
+ pmo->scratch.pmo_dcn4.num_stutter_candidates = 0;
+@@ -2044,7 +2051,7 @@ bool pmo_dcn4_fams2_init_for_stutter(str
+ pmo->scratch.pmo_dcn4.z8_vblank_optimizable = false;
+ }
+
+- if (pmo->soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us > 0) {
++ if (!stutter_optimization_too_expensive && pmo->soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us > 0) {
+ pmo->scratch.pmo_dcn4.optimal_vblank_reserved_time_for_stutter_us[pmo->scratch.pmo_dcn4.num_stutter_candidates] = (unsigned int)pmo->soc_bb->power_management_parameters.stutter_enter_plus_exit_latency_us;
+ pmo->scratch.pmo_dcn4.num_stutter_candidates++;
+ }
--- /dev/null
+From 7013a8268d311fded6c7a6528fc1de82668e75f6 Mon Sep 17 00:00:00 2001
+From: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+Date: Tue, 12 Nov 2024 10:11:42 -0600
+Subject: drm/amd: Fix initialization mistake for NBIO 7.7.0
+
+From: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+
+commit 7013a8268d311fded6c7a6528fc1de82668e75f6 upstream.
+
+There is a strapping issue on NBIO 7.7.0 that can lead to spurious PME
+events while in the D0 state.
+
+Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Link: https://lore.kernel.org/r/20241112161142.28974-1-mario.limonciello@amd.com
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 447a54a0f79c9a409ceaa17804bdd2e0206397b9)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
+@@ -247,6 +247,12 @@ static void nbio_v7_7_init_registers(str
+ if (def != data)
+ WREG32_SOC15(NBIO, 0, regBIF0_PCIE_MST_CTRL_3, data);
+
++ switch (adev->ip_versions[NBIO_HWIP][0]) {
++ case IP_VERSION(7, 7, 0):
++ data = RREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4) & ~BIT(23);
++ WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data);
++ break;
++ }
+ }
+
+ static void nbio_v7_7_update_medium_grain_clock_gating(struct amdgpu_device *adev,
--- /dev/null
+From df0279e2a1c0735e8ca80c5df8d9f8f9fc120b4a Mon Sep 17 00:00:00 2001
+From: Tim Huang <tim.huang@amd.com>
+Date: Mon, 28 Oct 2024 13:51:50 +0800
+Subject: drm/amd/pm: print pp_dpm_mclk in ascending order on SMU v14.0.0
+
+From: Tim Huang <tim.huang@amd.com>
+
+commit df0279e2a1c0735e8ca80c5df8d9f8f9fc120b4a upstream.
+
+Currently, the pp_dpm_mclk values are reported in descending order
+on SMU IP v14.0.0/1/4. Adjust to ascending order for consistency
+with other clock interfaces.
+
+Signed-off-by: Tim Huang <tim.huang@amd.com>
+Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit d4be16ccfd5bf822176740a51ff2306679a2247e)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
+@@ -1132,7 +1132,7 @@ static int smu_v14_0_common_get_dpm_leve
+ static int smu_v14_0_0_print_clk_levels(struct smu_context *smu,
+ enum smu_clk_type clk_type, char *buf)
+ {
+- int i, size = 0, ret = 0;
++ int i, idx, ret = 0, size = 0;
+ uint32_t cur_value = 0, value = 0, count = 0;
+ uint32_t min, max;
+
+@@ -1168,7 +1168,8 @@ static int smu_v14_0_0_print_clk_levels(
+ break;
+
+ for (i = 0; i < count; i++) {
+- ret = smu_v14_0_common_get_dpm_freq_by_index(smu, clk_type, i, &value);
++ idx = (clk_type == SMU_MCLK) ? (count - i - 1) : i;
++ ret = smu_v14_0_common_get_dpm_freq_by_index(smu, clk_type, idx, &value);
+ if (ret)
+ break;
+
--- /dev/null
+From 5a67c31669a3aca814a99428328d2be40d82b333 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Tue, 4 Jun 2024 18:05:00 +0200
+Subject: drm/amdgpu: enable GTT fallback handling for dGPUs only
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 5a67c31669a3aca814a99428328d2be40d82b333 upstream.
+
+That is just a waste of time on APUs.
+
+Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3704
+Fixes: 216c1282dde3 ("drm/amdgpu: use GTT only as fallback for VRAM|GTT")
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit e8fc090d322346e5ce4c4cfe03a8100e31f61c3c)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -180,7 +180,8 @@ void amdgpu_bo_placement_from_domain(str
+ * When GTT is just an alternative to VRAM make sure that we
+ * only use it as fallback and still try to fill up VRAM first.
+ */
+- if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)
++ if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM &&
++ !(adev->flags & AMD_IS_APU))
+ places[c].flags |= TTM_PL_FLAG_FALLBACK;
+ c++;
+ }
--- /dev/null
+From 0e5ac88fb918297a7484b67f2b484d43bed3fbbe Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Thu, 31 Oct 2024 10:04:17 +0100
+Subject: drm/amdgpu: fix check in gmc_v9_0_get_vm_pte()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 0e5ac88fb918297a7484b67f2b484d43bed3fbbe upstream.
+
+The coherency flags can only be determined when the BO is locked and that
+in turn is only guaranteed when the mapping is validated.
+
+Fix the check, move the resource check into the function and add an assert
+that the BO is locked.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Fixes: d1a372af1c3d ("drm/amdgpu: Set MTYPE in PTE based on BO flags")
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 1b4ca8546f5b5c482717bedb8e031227b1541539)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+@@ -1124,8 +1124,10 @@ static void gmc_v9_0_get_coherence_flags
+ uint64_t *flags)
+ {
+ struct amdgpu_device *bo_adev = amdgpu_ttm_adev(bo->tbo.bdev);
+- bool is_vram = bo->tbo.resource->mem_type == TTM_PL_VRAM;
+- bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT | AMDGPU_GEM_CREATE_EXT_COHERENT);
++ bool is_vram = bo->tbo.resource &&
++ bo->tbo.resource->mem_type == TTM_PL_VRAM;
++ bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT |
++ AMDGPU_GEM_CREATE_EXT_COHERENT);
+ bool ext_coherent = bo->flags & AMDGPU_GEM_CREATE_EXT_COHERENT;
+ bool uncached = bo->flags & AMDGPU_GEM_CREATE_UNCACHED;
+ struct amdgpu_vm *vm = mapping->bo_va->base.vm;
+@@ -1133,6 +1135,8 @@ static void gmc_v9_0_get_coherence_flags
+ bool snoop = false;
+ bool is_local;
+
++ dma_resv_assert_held(bo->tbo.base.resv);
++
+ switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
+ case IP_VERSION(9, 4, 1):
+ case IP_VERSION(9, 4, 2):
+@@ -1251,9 +1255,8 @@ static void gmc_v9_0_get_vm_pte(struct a
+ *flags &= ~AMDGPU_PTE_VALID;
+ }
+
+- if (bo && bo->tbo.resource)
+- gmc_v9_0_get_coherence_flags(adev, mapping->bo_va->base.bo,
+- mapping, flags);
++ if ((*flags & AMDGPU_PTE_VALID) && bo)
++ gmc_v9_0_get_coherence_flags(adev, bo, mapping, flags);
+ }
+
+ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,
--- /dev/null
+From d641a151fcaf0d043075b214b469a14abab25af2 Mon Sep 17 00:00:00 2001
+From: David Rosca <david.rosca@amd.com>
+Date: Mon, 21 Oct 2024 09:36:11 +0200
+Subject: drm/amdgpu: Fix video caps for H264 and HEVC encode maximum size
+
+From: David Rosca <david.rosca@amd.com>
+
+commit d641a151fcaf0d043075b214b469a14abab25af2 upstream.
+
+H264 supports 4096x4096 starting from Polaris.
+HEVC also supports 4096x4096, with VCN 3 and newer 8192x4352
+is supported.
+
+Signed-off-by: David Rosca <david.rosca@amd.com>
+Reviewed-by: Leo Liu <leo.liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 69e9a9e65b1ea542d07e3fdd4222b46e9f5a3a29)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/nv.c | 12 ++++++------
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 4 ++--
+ drivers/gpu/drm/amd/amdgpu/soc21.c | 12 ++++++------
+ drivers/gpu/drm/amd/amdgpu/soc24.c | 2 +-
+ drivers/gpu/drm/amd/amdgpu/vi.c | 8 ++++----
+ 5 files changed, 19 insertions(+), 19 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/nv.c
++++ b/drivers/gpu/drm/amd/amdgpu/nv.c
+@@ -67,8 +67,8 @@ static const struct amd_ip_funcs nv_comm
+
+ /* Navi */
+ static const struct amdgpu_video_codec_info nv_video_codecs_encode_array[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 0)},
+ };
+
+ static const struct amdgpu_video_codecs nv_video_codecs_encode = {
+@@ -94,8 +94,8 @@ static const struct amdgpu_video_codecs
+
+ /* Sienna Cichlid */
+ static const struct amdgpu_video_codec_info sc_video_codecs_encode_array[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ };
+
+ static const struct amdgpu_video_codecs sc_video_codecs_encode = {
+@@ -136,8 +136,8 @@ static const struct amdgpu_video_codecs
+
+ /* SRIOV Sienna Cichlid, not const since data is controlled by host */
+ static struct amdgpu_video_codec_info sriov_sc_video_codecs_encode_array[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ };
+
+ static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn0[] = {
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -90,8 +90,8 @@ static const struct amd_ip_funcs soc15_c
+ /* Vega, Raven, Arcturus */
+ static const struct amdgpu_video_codec_info vega_video_codecs_encode_array[] =
+ {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 0)},
+ };
+
+ static const struct amdgpu_video_codecs vega_video_codecs_encode =
+--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
+@@ -49,13 +49,13 @@ static const struct amd_ip_funcs soc21_c
+
+ /* SOC21 */
+ static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn0[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
+ };
+
+ static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn1[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ };
+
+@@ -96,14 +96,14 @@ static const struct amdgpu_video_codecs
+
+ /* SRIOV SOC21, not const since data is controlled by host */
+ static struct amdgpu_video_codec_info sriov_vcn_4_0_0_video_codecs_encode_array_vcn0[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
+ };
+
+ static struct amdgpu_video_codec_info sriov_vcn_4_0_0_video_codecs_encode_array_vcn1[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ };
+
+ static struct amdgpu_video_codecs sriov_vcn_4_0_0_video_codecs_encode_vcn0 = {
+--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
+@@ -48,7 +48,7 @@
+ static const struct amd_ip_funcs soc24_common_ip_funcs;
+
+ static const struct amdgpu_video_codec_info vcn_5_0_0_video_codecs_encode_array_vcn0[] = {
+- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
+ };
+--- a/drivers/gpu/drm/amd/amdgpu/vi.c
++++ b/drivers/gpu/drm/amd/amdgpu/vi.c
+@@ -136,15 +136,15 @@ static const struct amdgpu_video_codec_i
+ {
+ .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC,
+ .max_width = 4096,
+- .max_height = 2304,
+- .max_pixels_per_frame = 4096 * 2304,
++ .max_height = 4096,
++ .max_pixels_per_frame = 4096 * 4096,
+ .max_level = 0,
+ },
+ {
+ .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC,
+ .max_width = 4096,
+- .max_height = 2304,
+- .max_pixels_per_frame = 4096 * 2304,
++ .max_height = 4096,
++ .max_pixels_per_frame = 4096 * 4096,
+ .max_level = 0,
+ },
+ };
--- /dev/null
+From 79365ea70714427b4dff89b43234ad7c3233d7ba Mon Sep 17 00:00:00 2001
+From: Jack Xiao <Jack.Xiao@amd.com>
+Date: Mon, 4 Nov 2024 18:06:01 +0800
+Subject: drm/amdgpu/mes12: correct kiq unmap latency
+
+From: Jack Xiao <Jack.Xiao@amd.com>
+
+commit 79365ea70714427b4dff89b43234ad7c3233d7ba upstream.
+
+Correct kiq unmap queue timeout value.
+
+Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit cfe98204a06329b6b7fce1b828b7d620473181ff)
+Cc: stable@vger.kernel.org # 6.11.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+@@ -524,7 +524,7 @@ static int mes_v12_0_set_hw_resources_1(
+ mes_set_hw_res_1_pkt.header.type = MES_API_TYPE_SCHEDULER;
+ mes_set_hw_res_1_pkt.header.opcode = MES_SCH_API_SET_HW_RSRC_1;
+ mes_set_hw_res_1_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
+- mes_set_hw_res_1_pkt.mes_kiq_unmap_timeout = 100;
++ mes_set_hw_res_1_pkt.mes_kiq_unmap_timeout = 0xa;
+
+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
+ &mes_set_hw_res_1_pkt, sizeof(mes_set_hw_res_1_pkt),
--- /dev/null
+From 9776c0a75a1a86b753b2dc7c1ecc3baa048a8dec Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 11 Nov 2024 13:41:25 +1000
+Subject: nouveau/dp: handle retries for AUX CH transfers with GSP.
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit 9776c0a75a1a86b753b2dc7c1ecc3baa048a8dec upstream.
+
+eb284f4b3781 drm/nouveau/dp: Honor GSP link training retry timeouts
+
+tried to fix a problem with panel retires, however it appears
+the auxch also needs the same treatment, so add the same retry
+wrapper around it.
+
+This fixes some eDP panels after a suspend/resume cycle.
+
+Fixes: eb284f4b3781 ("drm/nouveau/dp: Honor GSP link training retry timeouts")
+Cc: stable@vger.kernel.org
+Reviewed-by: Lyude Paul <lyude@redhat.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20241111034126.2028401-2-airlied@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ .../gpu/drm/nouveau/nvkm/engine/disp/r535.c | 59 +++++++++++--------
+ 1 file changed, 35 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
+index 8f9aa3463c3c..99110ab2f44d 100644
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
+@@ -1060,33 +1060,44 @@ r535_dp_aux_xfer(struct nvkm_outp *outp, u8 type, u32 addr, u8 *data, u8 *psize)
+ NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *ctrl;
+ u8 size = *psize;
+ int ret;
++ int retries;
+
+- ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_AUXCH_CTRL, sizeof(*ctrl));
+- if (IS_ERR(ctrl))
+- return PTR_ERR(ctrl);
++ for (retries = 0; retries < 3; ++retries) {
++ ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_AUXCH_CTRL, sizeof(*ctrl));
++ if (IS_ERR(ctrl))
++ return PTR_ERR(ctrl);
+
+- ctrl->subDeviceInstance = 0;
+- ctrl->displayId = BIT(outp->index);
+- ctrl->bAddrOnly = !size;
+- ctrl->cmd = type;
+- if (ctrl->bAddrOnly) {
+- ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, REQ_TYPE, WRITE);
+- ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, I2C_MOT, FALSE);
++ ctrl->subDeviceInstance = 0;
++ ctrl->displayId = BIT(outp->index);
++ ctrl->bAddrOnly = !size;
++ ctrl->cmd = type;
++ if (ctrl->bAddrOnly) {
++ ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, REQ_TYPE, WRITE);
++ ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, I2C_MOT, FALSE);
++ }
++ ctrl->addr = addr;
++ ctrl->size = !ctrl->bAddrOnly ? (size - 1) : 0;
++ memcpy(ctrl->data, data, size);
++
++ ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl));
++ if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) {
++ /*
++ * Device (likely an eDP panel) isn't ready yet, wait for the time specified
++ * by GSP before retrying again
++ */
++ nvkm_debug(&disp->engine.subdev,
++ "Waiting %dms for GSP LT panel delay before retrying in AUX\n",
++ ctrl->retryTimeMs);
++ msleep(ctrl->retryTimeMs);
++ nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl);
++ } else {
++ memcpy(data, ctrl->data, size);
++ *psize = ctrl->size;
++ ret = ctrl->replyType;
++ nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl);
++ break;
++ }
+ }
+- ctrl->addr = addr;
+- ctrl->size = !ctrl->bAddrOnly ? (size - 1) : 0;
+- memcpy(ctrl->data, data, size);
+-
+- ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl));
+- if (ret) {
+- nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl);
+- return ret;
+- }
+-
+- memcpy(data, ctrl->data, size);
+- *psize = ctrl->size;
+- ret = ctrl->replyType;
+- nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl);
+ return ret;
+ }
+
+--
+2.47.0
+
--- /dev/null
+From 21ec425eaf2cb7c0371f7683f81ad7d9679b6eb5 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Wed, 13 Nov 2024 05:57:03 +1000
+Subject: nouveau: fw: sync dma after setup is called.
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit 21ec425eaf2cb7c0371f7683f81ad7d9679b6eb5 upstream.
+
+When this code moved to non-coherent allocator the sync was put too
+early for some firmwares which called the setup function, move the
+sync down after the setup function.
+
+Reported-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
+Tested-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
+Reviewed-by: Lyude Paul <lyude@redhat.com>
+Fixes: 9b340aeb26d5 ("nouveau/firmware: use dma non-coherent allocator")
+Cc: stable@vger.kernel.org
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20241114004603.3095485-1-airlied@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/nouveau/nvkm/falcon/fw.c | 11 ++++++-----
+ 1 file changed, 6 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
++++ b/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c
+@@ -89,11 +89,6 @@ nvkm_falcon_fw_boot(struct nvkm_falcon_f
+ nvkm_falcon_fw_dtor_sigs(fw);
+ }
+
+- /* after last write to the img, sync dma mappings */
+- dma_sync_single_for_device(fw->fw.device->dev,
+- fw->fw.phys,
+- sg_dma_len(&fw->fw.mem.sgl),
+- DMA_TO_DEVICE);
+
+ FLCNFW_DBG(fw, "resetting");
+ fw->func->reset(fw);
+@@ -105,6 +100,12 @@ nvkm_falcon_fw_boot(struct nvkm_falcon_f
+ goto done;
+ }
+
++ /* after last write to the img, sync dma mappings */
++ dma_sync_single_for_device(fw->fw.device->dev,
++ fw->fw.phys,
++ sg_dma_len(&fw->fw.mem.sgl),
++ DMA_TO_DEVICE);
++
+ ret = fw->func->load(fw);
+ if (ret)
+ goto done;
--- /dev/null
+From b6ad7debf5ab3e581b5cb0f5c94e404ec968bd5b Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 11 Nov 2024 13:41:24 +1000
+Subject: nouveau: handle EBUSY and EAGAIN for GSP aux errors.
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit b6ad7debf5ab3e581b5cb0f5c94e404ec968bd5b upstream.
+
+The upper layer transfer functions expect EBUSY as a return
+for when retries should be done.
+
+Fix the AUX error translation, but also check for both errors
+in a few places.
+
+Fixes: eb284f4b3781 ("drm/nouveau/dp: Honor GSP link training retry timeouts")
+Cc: stable@vger.kernel.org
+Reviewed-by: Lyude Paul <lyude@redhat.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20241111034126.2028401-1-airlied@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c | 2 +-
+ drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c | 6 +++---
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
+@@ -992,7 +992,7 @@ r535_dp_train_target(struct nvkm_outp *o
+ ctrl->data = data;
+
+ ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl));
+- if (ret == -EAGAIN && ctrl->retryTimeMs) {
++ if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) {
+ /*
+ * Device (likely an eDP panel) isn't ready yet, wait for the time specified
+ * by GSP before retrying again
+--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
+@@ -78,7 +78,7 @@ r535_rpc_status_to_errno(uint32_t rpc_st
+ switch (rpc_status) {
+ case 0x55: /* NV_ERR_NOT_READY */
+ case 0x66: /* NV_ERR_TIMEOUT_RETRY */
+- return -EAGAIN;
++ return -EBUSY;
+ case 0x51: /* NV_ERR_NO_MEMORY */
+ return -ENOMEM;
+ default:
+@@ -601,7 +601,7 @@ r535_gsp_rpc_rm_alloc_push(struct nvkm_g
+
+ if (rpc->status) {
+ ret = ERR_PTR(r535_rpc_status_to_errno(rpc->status));
+- if (PTR_ERR(ret) != -EAGAIN)
++ if (PTR_ERR(ret) != -EAGAIN && PTR_ERR(ret) != -EBUSY)
+ nvkm_error(&gsp->subdev, "RM_ALLOC: 0x%x\n", rpc->status);
+ } else {
+ ret = repc ? rpc->params : NULL;
+@@ -660,7 +660,7 @@ r535_gsp_rpc_rm_ctrl_push(struct nvkm_gs
+
+ if (rpc->status) {
+ ret = r535_rpc_status_to_errno(rpc->status);
+- if (ret != -EAGAIN)
++ if (ret != -EAGAIN && ret != -EBUSY)
+ nvkm_error(&gsp->subdev, "cli:0x%08x obj:0x%08x ctrl cmd:0x%08x failed: 0x%08x\n",
+ object->client->object.handle, object->handle, rpc->cmd, rpc->status);
+ }
--- /dev/null
+From 0bf020344204a2c1067b7562b6a247e6c689e28b Mon Sep 17 00:00:00 2001
+From: Sibi Sankar <quic_sibis@quicinc.com>
+Date: Wed, 30 Oct 2024 18:25:11 +0530
+Subject: pmdomain: arm: Use FLAG_DEV_NAME_FW to ensure unique names
+
+From: Sibi Sankar <quic_sibis@quicinc.com>
+
+commit 0bf020344204a2c1067b7562b6a247e6c689e28b upstream.
+
+The domain attributes returned by the perf protocol can end up reporting
+identical names across domains, resulting in debugfs node creation failure.
+Use the GENPD_FLAG_DEV_NAME_FW to ensure the genpd providers end up with an
+unique name.
+
+Logs: [X1E reports 'NCC' for all its scmi perf domains]
+debugfs: Directory 'NCC' with parent 'pm_genpd' already present!
+debugfs: Directory 'NCC' with parent 'pm_genpd' already present!
+
+Reported-by: Johan Hovold <johan+linaro@kernel.org>
+Closes: https://lore.kernel.org/lkml/ZoQjAWse2YxwyRJv@hovoldconsulting.com/
+Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
+Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
+Cc: stable@vger.kernel.org
+Message-ID: <20241030125512.2884761-6-quic_sibis@quicinc.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pmdomain/arm/scmi_perf_domain.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/pmdomain/arm/scmi_perf_domain.c
++++ b/drivers/pmdomain/arm/scmi_perf_domain.c
+@@ -125,7 +125,8 @@ static int scmi_perf_domain_probe(struct
+ scmi_pd->ph = ph;
+ scmi_pd->genpd.name = scmi_pd->info->name;
+ scmi_pd->genpd.flags = GENPD_FLAG_ALWAYS_ON |
+- GENPD_FLAG_OPP_TABLE_FW;
++ GENPD_FLAG_OPP_TABLE_FW |
++ GENPD_FLAG_DEV_NAME_FW;
+ scmi_pd->genpd.set_performance_state = scmi_pd_set_perf_state;
+ scmi_pd->genpd.attach_dev = scmi_pd_attach_dev;
+ scmi_pd->genpd.detach_dev = scmi_pd_detach_dev;
--- /dev/null
+From 899f44531fe6cac4b024710fec647ecc127724b8 Mon Sep 17 00:00:00 2001
+From: Sibi Sankar <quic_sibis@quicinc.com>
+Date: Wed, 30 Oct 2024 18:25:10 +0530
+Subject: pmdomain: core: Add GENPD_FLAG_DEV_NAME_FW flag
+
+From: Sibi Sankar <quic_sibis@quicinc.com>
+
+commit 899f44531fe6cac4b024710fec647ecc127724b8 upstream.
+
+Introduce GENPD_FLAG_DEV_NAME_FW flag which instructs genpd to generate
+an unique device name using ida. It is aimed to be used by genpd providers
+which derive their names directly from FW making them susceptible to
+debugfs node creation failures.
+
+Reported-by: Johan Hovold <johan+linaro@kernel.org>
+Closes: https://lore.kernel.org/lkml/ZoQjAWse2YxwyRJv@hovoldconsulting.com/
+Fixes: 718072ceb211 ("PM: domains: create debugfs nodes when adding power domains")
+Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
+Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
+Cc: stable@vger.kernel.org
+Message-ID: <20241030125512.2884761-5-quic_sibis@quicinc.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pmdomain/core.c | 49 +++++++++++++++++++++++++++++++---------------
+ include/linux/pm_domain.h | 6 +++++
+ 2 files changed, 40 insertions(+), 15 deletions(-)
+
+--- a/drivers/pmdomain/core.c
++++ b/drivers/pmdomain/core.c
+@@ -7,6 +7,7 @@
+ #define pr_fmt(fmt) "PM: " fmt
+
+ #include <linux/delay.h>
++#include <linux/idr.h>
+ #include <linux/kernel.h>
+ #include <linux/io.h>
+ #include <linux/platform_device.h>
+@@ -23,6 +24,9 @@
+ #include <linux/cpu.h>
+ #include <linux/debugfs.h>
+
++/* Provides a unique ID for each genpd device */
++static DEFINE_IDA(genpd_ida);
++
+ #define GENPD_RETRY_MAX_MS 250 /* Approximate */
+
+ #define GENPD_DEV_CALLBACK(genpd, type, callback, dev) \
+@@ -129,6 +133,7 @@ static const struct genpd_lock_ops genpd
+ #define genpd_is_cpu_domain(genpd) (genpd->flags & GENPD_FLAG_CPU_DOMAIN)
+ #define genpd_is_rpm_always_on(genpd) (genpd->flags & GENPD_FLAG_RPM_ALWAYS_ON)
+ #define genpd_is_opp_table_fw(genpd) (genpd->flags & GENPD_FLAG_OPP_TABLE_FW)
++#define genpd_is_dev_name_fw(genpd) (genpd->flags & GENPD_FLAG_DEV_NAME_FW)
+
+ static inline bool irq_safe_dev_in_sleep_domain(struct device *dev,
+ const struct generic_pm_domain *genpd)
+@@ -147,7 +152,7 @@ static inline bool irq_safe_dev_in_sleep
+
+ if (ret)
+ dev_warn_once(dev, "PM domain %s will not be powered off\n",
+- genpd->name);
++ dev_name(&genpd->dev));
+
+ return ret;
+ }
+@@ -232,7 +237,7 @@ static void genpd_debug_remove(struct ge
+ if (!genpd_debugfs_dir)
+ return;
+
+- debugfs_lookup_and_remove(genpd->name, genpd_debugfs_dir);
++ debugfs_lookup_and_remove(dev_name(&genpd->dev), genpd_debugfs_dir);
+ }
+
+ static void genpd_update_accounting(struct generic_pm_domain *genpd)
+@@ -689,7 +694,7 @@ static int _genpd_power_on(struct generi
+ genpd->states[state_idx].power_on_latency_ns = elapsed_ns;
+ genpd->gd->max_off_time_changed = true;
+ pr_debug("%s: Power-%s latency exceeded, new value %lld ns\n",
+- genpd->name, "on", elapsed_ns);
++ dev_name(&genpd->dev), "on", elapsed_ns);
+
+ out:
+ raw_notifier_call_chain(&genpd->power_notifiers, GENPD_NOTIFY_ON, NULL);
+@@ -740,7 +745,7 @@ static int _genpd_power_off(struct gener
+ genpd->states[state_idx].power_off_latency_ns = elapsed_ns;
+ genpd->gd->max_off_time_changed = true;
+ pr_debug("%s: Power-%s latency exceeded, new value %lld ns\n",
+- genpd->name, "off", elapsed_ns);
++ dev_name(&genpd->dev), "off", elapsed_ns);
+
+ out:
+ raw_notifier_call_chain(&genpd->power_notifiers, GENPD_NOTIFY_OFF,
+@@ -1898,7 +1903,7 @@ int dev_pm_genpd_add_notifier(struct dev
+
+ if (ret) {
+ dev_warn(dev, "failed to add notifier for PM domain %s\n",
+- genpd->name);
++ dev_name(&genpd->dev));
+ return ret;
+ }
+
+@@ -1945,7 +1950,7 @@ int dev_pm_genpd_remove_notifier(struct
+
+ if (ret) {
+ dev_warn(dev, "failed to remove notifier for PM domain %s\n",
+- genpd->name);
++ dev_name(&genpd->dev));
+ return ret;
+ }
+
+@@ -1971,7 +1976,7 @@ static int genpd_add_subdomain(struct ge
+ */
+ if (!genpd_is_irq_safe(genpd) && genpd_is_irq_safe(subdomain)) {
+ WARN(1, "Parent %s of subdomain %s must be IRQ safe\n",
+- genpd->name, subdomain->name);
++ dev_name(&genpd->dev), subdomain->name);
+ return -EINVAL;
+ }
+
+@@ -2046,7 +2051,7 @@ int pm_genpd_remove_subdomain(struct gen
+
+ if (!list_empty(&subdomain->parent_links) || subdomain->device_count) {
+ pr_warn("%s: unable to remove subdomain %s\n",
+- genpd->name, subdomain->name);
++ dev_name(&genpd->dev), subdomain->name);
+ ret = -EBUSY;
+ goto out;
+ }
+@@ -2180,6 +2185,7 @@ int pm_genpd_init(struct generic_pm_doma
+ genpd->status = is_off ? GENPD_STATE_OFF : GENPD_STATE_ON;
+ genpd->device_count = 0;
+ genpd->provider = NULL;
++ genpd->device_id = -ENXIO;
+ genpd->has_provider = false;
+ genpd->accounting_time = ktime_get_mono_fast_ns();
+ genpd->domain.ops.runtime_suspend = genpd_runtime_suspend;
+@@ -2220,7 +2226,18 @@ int pm_genpd_init(struct generic_pm_doma
+ return ret;
+
+ device_initialize(&genpd->dev);
+- dev_set_name(&genpd->dev, "%s", genpd->name);
++
++ if (!genpd_is_dev_name_fw(genpd)) {
++ dev_set_name(&genpd->dev, "%s", genpd->name);
++ } else {
++ ret = ida_alloc(&genpd_ida, GFP_KERNEL);
++ if (ret < 0) {
++ put_device(&genpd->dev);
++ return ret;
++ }
++ genpd->device_id = ret;
++ dev_set_name(&genpd->dev, "%s_%u", genpd->name, genpd->device_id);
++ }
+
+ mutex_lock(&gpd_list_lock);
+ list_add(&genpd->gpd_list_node, &gpd_list);
+@@ -2242,13 +2259,13 @@ static int genpd_remove(struct generic_p
+
+ if (genpd->has_provider) {
+ genpd_unlock(genpd);
+- pr_err("Provider present, unable to remove %s\n", genpd->name);
++ pr_err("Provider present, unable to remove %s\n", dev_name(&genpd->dev));
+ return -EBUSY;
+ }
+
+ if (!list_empty(&genpd->parent_links) || genpd->device_count) {
+ genpd_unlock(genpd);
+- pr_err("%s: unable to remove %s\n", __func__, genpd->name);
++ pr_err("%s: unable to remove %s\n", __func__, dev_name(&genpd->dev));
+ return -EBUSY;
+ }
+
+@@ -2262,9 +2279,11 @@ static int genpd_remove(struct generic_p
+ genpd_unlock(genpd);
+ genpd_debug_remove(genpd);
+ cancel_work_sync(&genpd->power_off_work);
++ if (genpd->device_id != -ENXIO)
++ ida_free(&genpd_ida, genpd->device_id);
+ genpd_free_data(genpd);
+
+- pr_debug("%s: removed %s\n", __func__, genpd->name);
++ pr_debug("%s: removed %s\n", __func__, dev_name(&genpd->dev));
+
+ return 0;
+ }
+@@ -3226,12 +3245,12 @@ static int genpd_summary_one(struct seq_
+ else
+ snprintf(state, sizeof(state), "%s",
+ status_lookup[genpd->status]);
+- seq_printf(s, "%-30s %-30s %u", genpd->name, state, genpd->performance_state);
++ seq_printf(s, "%-30s %-30s %u", dev_name(&genpd->dev), state, genpd->performance_state);
+
+ /*
+ * Modifications on the list require holding locks on both
+ * parent and child, so we are safe.
+- * Also genpd->name is immutable.
++ * Also the device name is immutable.
+ */
+ list_for_each_entry(link, &genpd->parent_links, parent_node) {
+ if (list_is_first(&link->parent_node, &genpd->parent_links))
+@@ -3456,7 +3475,7 @@ static void genpd_debug_add(struct gener
+ if (!genpd_debugfs_dir)
+ return;
+
+- d = debugfs_create_dir(genpd->name, genpd_debugfs_dir);
++ d = debugfs_create_dir(dev_name(&genpd->dev), genpd_debugfs_dir);
+
+ debugfs_create_file("current_state", 0444,
+ d, genpd, &status_fops);
+--- a/include/linux/pm_domain.h
++++ b/include/linux/pm_domain.h
+@@ -92,6 +92,10 @@ struct dev_pm_domain_list {
+ * GENPD_FLAG_OPP_TABLE_FW: The genpd provider supports performance states,
+ * but its corresponding OPP tables are not
+ * described in DT, but are given directly by FW.
++ *
++ * GENPD_FLAG_DEV_NAME_FW: Instructs genpd to generate an unique device name
++ * using ida. It is used by genpd providers which
++ * get their genpd-names directly from FW.
+ */
+ #define GENPD_FLAG_PM_CLK (1U << 0)
+ #define GENPD_FLAG_IRQ_SAFE (1U << 1)
+@@ -101,6 +105,7 @@ struct dev_pm_domain_list {
+ #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
+ #define GENPD_FLAG_MIN_RESIDENCY (1U << 6)
+ #define GENPD_FLAG_OPP_TABLE_FW (1U << 7)
++#define GENPD_FLAG_DEV_NAME_FW (1U << 8)
+
+ enum gpd_status {
+ GENPD_STATE_ON = 0, /* PM domain is on */
+@@ -163,6 +168,7 @@ struct generic_pm_domain {
+ atomic_t sd_count; /* Number of subdomains with power "on" */
+ enum gpd_status status; /* Current state of the domain */
+ unsigned int device_count; /* Number of devices */
++ unsigned int device_id; /* unique device id */
+ unsigned int suspended_count; /* System suspend device counter */
+ unsigned int prepared_count; /* Suspend counter of prepared devices */
+ unsigned int performance_state; /* Aggregated max performance state */
--- /dev/null
+From f7c7c5aa556378a2c8da72c1f7f238b6648f95fb Mon Sep 17 00:00:00 2001
+From: Peng Fan <peng.fan@nxp.com>
+Date: Fri, 1 Nov 2024 18:12:51 +0800
+Subject: pmdomain: imx93-blk-ctrl: correct remove path
+
+From: Peng Fan <peng.fan@nxp.com>
+
+commit f7c7c5aa556378a2c8da72c1f7f238b6648f95fb upstream.
+
+The check condition should be 'i < bc->onecell_data.num_domains', not
+'bc->onecell_data.num_domains' which will make the look never finish
+and cause kernel panic.
+
+Also disable runtime to address
+"imx93-blk-ctrl 4ac10000.system-controller: Unbalanced pm_runtime_enable!"
+
+Fixes: e9aa77d413c9 ("soc: imx: add i.MX93 media blk ctrl driver")
+Signed-off-by: Peng Fan <peng.fan@nxp.com>
+Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
+Cc: stable@vger.kernel.org
+Message-ID: <20241101101252.1448466-1-peng.fan@oss.nxp.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pmdomain/imx/imx93-blk-ctrl.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/pmdomain/imx/imx93-blk-ctrl.c
++++ b/drivers/pmdomain/imx/imx93-blk-ctrl.c
+@@ -313,7 +313,9 @@ static void imx93_blk_ctrl_remove(struct
+
+ of_genpd_del_provider(pdev->dev.of_node);
+
+- for (i = 0; bc->onecell_data.num_domains; i++) {
++ pm_runtime_disable(&pdev->dev);
++
++ for (i = 0; i < bc->onecell_data.num_domains; i++) {
+ struct imx93_blk_ctrl_domain *domain = &bc->domains[i];
+
+ pm_genpd_remove(&domain->genpd);
drm-bridge-tc358768-fix-dsi-command-tx.patch
drm-xe-handle-flat-ccs-during-hibernation-on-igpu.patch
drm-xe-oa-fix-missing-outer-runtime-pm-protection-warning.patch
+pmdomain-imx93-blk-ctrl-correct-remove-path.patch
+pmdomain-arm-use-flag_dev_name_fw-to-ensure-unique-names.patch
+pmdomain-core-add-genpd_flag_dev_name_fw-flag.patch
+nouveau-fw-sync-dma-after-setup-is-called.patch
+nouveau-handle-ebusy-and-eagain-for-gsp-aux-errors.patch
+nouveau-dp-handle-retries-for-aux-ch-transfers-with-gsp.patch
+drm-amd-fix-initialization-mistake-for-nbio-7.7.0.patch
+drm-amdgpu-fix-check-in-gmc_v9_0_get_vm_pte.patch
+drm-amdgpu-fix-video-caps-for-h264-and-hevc-encode-maximum-size.patch
+drm-amd-pm-print-pp_dpm_mclk-in-ascending-order-on-smu-v14.0.0.patch
+drm-amdgpu-enable-gtt-fallback-handling-for-dgpus-only.patch
+drm-amdgpu-mes12-correct-kiq-unmap-latency.patch
+drm-amd-display-adjust-vsdb-parser-for-replay-feature.patch
+drm-amd-display-require-minimum-vblank-size-for-stutter-optimization.patch
+drm-amd-display-handle-dml-allocation-failure-to-avoid-crash.patch
+drm-amd-display-fix-failure-to-read-vram-info-due-to-static-bp_result.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
