Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa86b71a703eec61ce5aee79c00d3f4059bb2d52..b0365c1ba9392eb052a638ef756a1088777f6ae0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,60 @@
+2025-02-18  Andi Kleen  <ak@gcc.gnu.org>
+
+       * doc/invoke.texi:
+
+2025-02-18  David Malcolm  <dmalcolm@redhat.com>
+
+       * opts-diagnostic.cc (sarif_scheme_handler::make_sink): Put
+       properties in alphabetical order.
+
+2025-02-18  Robin Dapp  <rdapp@ventanamicro.com>
+
+       PR target/115703
+       * config/riscv/riscv-vsetvl.cc: Use max_sew for calculating the
+       new LMUL.
+
+2025-02-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR rtl-optimization/108840
+       * late-combine.cc (late_combine::check_register_pressure):
+       Take only allocatable registers into account when checking
+       the permissiveness of register classes.
+
+2025-02-18  Alex Coplan  <alex.coplan@arm.com>
+
+       PR rtl-optimization/118320
+       * pair-fusion.cc (pair_fusion_bb_info::fuse_pair): Tweak wording in dump
+       message when punting on invalid use arrays.
+
+2025-02-18  Soumya AR  <soumyaa@nvidia.com>
+
+       * config/aarch64/tuning_models/generic_armv8_a.h: Updated prefetch
+       struct pointer.
+
+2025-02-18  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/98845
+       * tree-ssa-tail-merge.cc (stmt_local_def): Consider a
+       def with no uses not local.
+
+2025-02-18  Pan Li  <pan2.li@intel.com>
+
+       PR target/118540
+       * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
+       Report error when cmd xlen is different with target attribute.
+
+2025-02-18  Haochen Jiang  <haochen.jiang@intel.com>
+
+       * config/i386/i386.opt.urls: Adjust the order for avx10.2
+       and avx10.2-512 due to their order change in i386.opt.
+
+2025-02-18  Alexandre Oliva  <oliva@adacore.com>
+
+       PR tree-optimization/118805
+       * gimple-fold.cc (fold_truth_andor_for_combine): Detect and
+       cope with zero-extension in signbit tests.  Reject swapping
+       right-compare operands if rsignbit.
+
 2025-02-17  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.cc (ix86_find_all_reg_use):

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index bec432ba466a95b382ec3a88b79897af71bfc256..7462e91a3a7543e1f95722a1609bd25f21f3f19c 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250218
+20250219

diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog
index 9fd30529a5fc5ec91e6f0d50b1de25487b56c27b..69955f72892abc1e2a797cee80054a3ac9202fc6 100644 (file)
--- a/gcc/analyzer/ChangeLog
+++ b/gcc/analyzer/ChangeLog
@@ -1,3 +1,13 @@
+2025-02-18  David Malcolm  <dmalcolm@redhat.com>
+
+       * diagnostic-manager.cc
+       (saved_diagnostic::maybe_add_sarif_properties): Add various
+       properties for debugging, for m_stmt, m_var, and m_duplicates.
+       Remove stray 'if' statement.  Capture the kind of the
+       pending_diagnostic.
+       * region-model.cc
+       (poisoned_value_diagnostic::maybe_add_sarif_properties): New.
+
 2024-12-06  David Malcolm  <dmalcolm@redhat.com>
 
        * region-model.cc: Include "gcc-urlifier.h".

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ee2632a8a6d333ca7615b01bf592bb0b6860161e..0d836d507c5f92b3e96fadc4622062d805fb1c2d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,68 @@
+2025-02-18  Robin Dapp  <rdapp@ventanamicro.com>
+
+       PR target/115703
+       * gcc.target/riscv/rvv/autovec/pr115703-run.c: New test.
+       * gcc.target/riscv/rvv/autovec/pr115703.c: New test.
+
+2025-02-18  John David Anglin  <danglin@gcc.gnu.org>
+
+       PR testsuite/116986
+       * gcc.dg/crc-builtin-rev-target32.c: Include stdint.h
+       instead of stdint-gcc.h.
+       * gcc.dg/crc-builtin-rev-target64.c: Likewise.
+       * gcc.dg/crc-builtin-target32.c: Likewise.
+       * gcc.dg/crc-builtin-target64.c: Likewise.
+       * gcc.dg/torture/pr115387-2.c: Likewise.
+
+2025-02-18  Tobias Burnus  <tburnus@baylibre.com>
+
+       * gfortran.dg/gomp/metadirective-3.f90: Add xfail when
+       compiling for offload_nvptx.
+
+2025-02-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR rtl-optimization/108840
+       * gcc.target/aarch64/pr108840.c: Run at -O2 but disable combine.
+
+2025-02-18  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/98845
+       * gcc.dg/pr98845.c: New testcase.
+       * gcc.dg/pr81192.c: Adjust.
+
+2025-02-18  Jin Ma  <jinma@linux.alibaba.com>
+
+       * gcc.target/riscv/rvv/base/bug-9.c: Added new failure check.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-17.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-18.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-19.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-20.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-21.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-22.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-23.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-24.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-25.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-26.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-27.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-28.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-29.c: Likewise.
+       * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-3.c: Likewise.
+
+2025-02-18  Pan Li  <pan2.li@intel.com>
+
+       PR target/118540
+       * gcc.target/riscv/rvv/base/pr118540-1.c: New test.
+       * gcc.target/riscv/rvv/base/pr118540-2.c: New test.
+
+2025-02-18  Alexandre Oliva  <oliva@adacore.com>
+
+       * lib/scanasm.exp (check-function-bodies): Fix usage comment.
+
+2025-02-18  Alexandre Oliva  <oliva@adacore.com>
+
+       PR tree-optimization/118805
+       * gcc.dg/field-merge-26.c: New.
+
 2025-02-17  Tobias Burnus  <tburnus@baylibre.com>
 
        PR fortran/115271

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index ce957da324259aeb380b7492e99effd15ee5e52a..681033aa05cc6b7b0721e87320cbe7568fbe6e66 100644 (file)
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,8 @@
+2025-02-18  Roman Kagan  <rkagan@amazon.de>
+
+       * config/i386/linux-unwind.h: Remove preprocessor
+       condition to enable fallback path for all libc-s.
+
 2025-02-17  Lulu Cheng  <chenglulu@loongson.cn>
 
        PR target/118844