--- /dev/null
+From 922adfd59efd337059f8445a8d8968552b06ed4e Mon Sep 17 00:00:00 2001
+From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Date: Thu, 29 Sep 2022 22:00:17 +0300
+Subject: phy: qcom-qmp-usb: correct registers layout for IPQ8074 USB3 PHY
+
+From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+commit 922adfd59efd337059f8445a8d8968552b06ed4e upstream.
+
+According to the kernel 4.4 sources from NHSS.QSDK.9.0.2 and according
+to hardware docs, the PHY registers layout used for IPQ8074 USB3 PHY is
+incorrect. This platform uses offset 0x174 for the PCS_STATUS register,
+0xd8 for PCS_AUTONOMOUS_MODE_CTRL, etc.
+
+Correct the PHY registers layout.
+
+Fixes: 94a407cc17a4 ("phy: qcom-qmp: create copies of QMP PHY driver")
+Fixes: 507156f5a99f ("phy: qcom-qmp: Add USB QMP PHY support for IPQ8074")
+Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Reviewed-by: Kathiravan T<quic_kathirav@quicinc.com>
+Link: https://lore.kernel.org/r/20220929190017.529207-1-dmitry.baryshkov@linaro.org
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
++++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+@@ -3408,7 +3408,7 @@ static const struct qmp_phy_cfg ipq8074_
+ .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
+ .vreg_list = qmp_phy_vreg_l,
+ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
+- .regs = usb3phy_regs_layout,
++ .regs = qmp_v3_usb3phy_regs_layout,
+
+ .start_ctrl = SERDES_START | PCS_START,
+ .pwrdn_ctrl = SW_PWRDN,