Make VMOV.F32 load the correct value into the destination register.

Bug 277780.  (Mans Rullgard, mans@mansr.com)

git-svn-id: svn://svn.valgrind.org/vex/trunk@2178

diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c
index 9402cb88e7484312a75862e3505362b337bb01ae..9e609629b9e9f1f9cf6e37290c4c5c4fecbcf528 100644 (file)
--- a/VEX/priv/guest_arm_toIR.c
+++ b/VEX/priv/guest_arm_toIR.c
@@ -7694,7 +7694,7 @@ Bool dis_neon_data_1reg_and_imm ( UInt theInstr, IRTemp condT )
          break;
       case 15:
          imm = (imm_raw & 0x80) << 5;
-         imm |= ~((imm_raw & 0x40) << 5);
+         imm |= ((~imm_raw & 0x40) << 5);
          for(i = 1; i <= 4; i++)
             imm |= (imm_raw & 0x40) << i;
          imm |= (imm_raw & 0x7f);

diff --git a/VEX/priv/host_arm_defs.c b/VEX/priv/host_arm_defs.c
index fb8df5c38cd5c6abcd55a44f00ad18c942f70eea..4230f8801a55b96491a3ffe371c010e56d312fae 100644 (file)
--- a/VEX/priv/host_arm_defs.c
+++ b/VEX/priv/host_arm_defs.c
@@ -588,7 +588,7 @@ ULong ARMNImm_to_Imm64 ( ARMNImm* imm ) {
          return x;
       case 10:
          x |= (x & 0x80) << 5;
-         x |= ~(x & 0x40) << 5;
+         x |= (~x & 0x40) << 5;
          x &= 0x187F; /* 0001 1000 0111 1111 */
          x |= (x & 0x40) << 4;
          x |= (x & 0x40) << 3;