--- /dev/null
+From c2db409cbc8751ccc7e6d2cc2e41af0d12ea637f Mon Sep 17 00:00:00 2001
+From: Seth Heasley <seth.heasley@intel.com>
+Date: Wed, 30 Jan 2013 15:25:32 +0000
+Subject: i2c: i801: SMBus patch for Intel Avoton DeviceIDs
+
+From: Seth Heasley <seth.heasley@intel.com>
+
+commit c2db409cbc8751ccc7e6d2cc2e41af0d12ea637f upstream.
+
+This patch adds the PCU SMBus DeviceID for the Intel Avoton SOC.
+
+Signed-off-by: Seth Heasley <seth.heasley@intel.com>
+Reviewed-by: Jean Delvare <khali@linux-fr.org>
+Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
+Cc: "Ong, Boon Leong" <boon.leong.ong@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ Documentation/i2c/busses/i2c-i801 | 1 +
+ drivers/i2c/busses/Kconfig | 1 +
+ drivers/i2c/busses/i2c-i801.c | 3 +++
+ 3 files changed, 5 insertions(+)
+
+--- a/Documentation/i2c/busses/i2c-i801
++++ b/Documentation/i2c/busses/i2c-i801
+@@ -22,6 +22,7 @@ Supported adapters:
+ * Intel Panther Point (PCH)
+ * Intel Lynx Point (PCH)
+ * Intel Lynx Point-LP (PCH)
++ * Intel Avoton (SOC)
+ Datasheets: Publicly available at the Intel website
+
+ On Intel Patsburg and later chipsets, both the normal host SMBus controller
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -105,6 +105,7 @@ config I2C_I801
+ Panther Point (PCH)
+ Lynx Point (PCH)
+ Lynx Point-LP (PCH)
++ Avoton (SOC)
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-i801.
+--- a/drivers/i2c/busses/i2c-i801.c
++++ b/drivers/i2c/busses/i2c-i801.c
+@@ -53,6 +53,7 @@
+ Panther Point (PCH) 0x1e22 32 hard yes yes yes
+ Lynx Point (PCH) 0x8c22 32 hard yes yes yes
+ Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes
++ Avoton (SOC) 0x1f3c 32 hard yes yes yes
+
+ Features supported by this driver:
+ Software PEC no
+@@ -145,6 +146,7 @@
+ #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
+ #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
+ #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
++#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c
+ #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
+ #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
+ #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
+@@ -639,6 +641,7 @@ static DEFINE_PCI_DEVICE_TABLE(i801_ids)
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
+ { 0, }
+ };
+