--- /dev/null
+From c667186f1c01ca8970c785888868b7ffd74e51ee Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Thu, 27 Apr 2017 19:06:48 +0100
+Subject: arm64: KVM: Fix decoding of Rt/Rt2 when trapping AArch32 CP accesses
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit c667186f1c01ca8970c785888868b7ffd74e51ee upstream.
+
+Our 32bit CP14/15 handling inherited some of the ARMv7 code for handling
+the trapped system registers, completely missing the fact that the
+fields for Rt and Rt2 are now 5 bit wide, and not 4...
+
+Let's fix it, and provide an accessor for the most common Rt case.
+
+Reviewed-by: Christoffer Dall <cdall@linaro.org>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Christoffer Dall <cdall@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kvm/sys_regs.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm64/kvm/sys_regs.c
++++ b/arch/arm64/kvm/sys_regs.c
+@@ -1054,8 +1054,8 @@ static int kvm_handle_cp_64(struct kvm_v
+ {
+ struct sys_reg_params params;
+ u32 hsr = kvm_vcpu_get_hsr(vcpu);
+- int Rt = (hsr >> 5) & 0xf;
+- int Rt2 = (hsr >> 10) & 0xf;
++ int Rt = (hsr >> 5) & 0x1f;
++ int Rt2 = (hsr >> 10) & 0x1f;
+
+ params.is_aarch32 = true;
+ params.is_32bit = false;
+@@ -1106,7 +1106,7 @@ static int kvm_handle_cp_32(struct kvm_v
+ {
+ struct sys_reg_params params;
+ u32 hsr = kvm_vcpu_get_hsr(vcpu);
+- int Rt = (hsr >> 5) & 0xf;
++ int Rt = (hsr >> 5) & 0x1f;
+
+ params.is_aarch32 = true;
+ params.is_32bit = true;