drm/i915: pass dev_priv explicitly to PP_ON_DELAYS

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_ON_DELAYS register macro.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0fc707fde15bc11893b6e1d5038162368e3a2b8d.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 367b3528e141d673409292cf7f269ee161efb27b..b7b4d78ec06a0baa865c2218d93dea112fde4dfe 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -164,7 +164,7 @@ static void intel_lvds_pps_get_hw_state(struct drm_i915_private *dev_priv,
        pps->powerdown_on_reset = intel_de_read(dev_priv,
                                                PP_CONTROL(dev_priv, 0)) & PANEL_POWER_RESET;
 
-       val = intel_de_read(dev_priv, PP_ON_DELAYS(0));
+       val = intel_de_read(dev_priv, PP_ON_DELAYS(dev_priv, 0));
        pps->port = REG_FIELD_GET(PANEL_PORT_SELECT_MASK, val);
        pps->t1_t2 = REG_FIELD_GET(PANEL_POWER_UP_DELAY_MASK, val);
        pps->t5 = REG_FIELD_GET(PANEL_LIGHT_ON_DELAY_MASK, val);
@@ -217,7 +217,7 @@ static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv,
                val |= PANEL_POWER_RESET;
        intel_de_write(dev_priv, PP_CONTROL(dev_priv, 0), val);
 
-       intel_de_write(dev_priv, PP_ON_DELAYS(0),
+       intel_de_write(dev_priv, PP_ON_DELAYS(dev_priv, 0),
                       REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, pps->port) |
                       REG_FIELD_PREP(PANEL_POWER_UP_DELAY_MASK, pps->t1_t2) |
                       REG_FIELD_PREP(PANEL_LIGHT_ON_DELAY_MASK, pps->t5));

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 6b185424271df05ec4c0973be7f24c676b8d40c2..803a1e353c06068e368c89f2c97d0252f2b3cc28 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -292,7 +292,7 @@ vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
        enum pipe pipe;
 
        for (pipe = PIPE_A; pipe <= PIPE_B; pipe++) {
-               u32 port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(pipe)) &
+               u32 port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(dev_priv, pipe)) &
                        PANEL_PORT_SELECT_MASK;
 
                if (port_sel != PANEL_PORT_SELECT_VLV(port))
@@ -493,7 +493,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
 
        regs->pp_ctrl = PP_CONTROL(dev_priv, pps_idx);
        regs->pp_stat = PP_STATUS(dev_priv, pps_idx);
-       regs->pp_on = PP_ON_DELAYS(pps_idx);
+       regs->pp_on = PP_ON_DELAYS(dev_priv, pps_idx);
        regs->pp_off = PP_OFF_DELAYS(pps_idx);
 
        /* Cycle delay moved from PP_DIVISOR to PP_CONTROL */
@@ -1111,7 +1111,7 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp)
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
        enum pipe pipe = intel_dp->pps.pps_pipe;
-       i915_reg_t pp_on_reg = PP_ON_DELAYS(pipe);
+       i915_reg_t pp_on_reg = PP_ON_DELAYS(dev_priv, pipe);
 
        drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE);
 
@@ -1715,7 +1715,7 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
                u32 port_sel;
 
                pp_reg = PP_CONTROL(dev_priv, 0);
-               port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
+               port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(dev_priv, 0)) & PANEL_PORT_SELECT_MASK;
 
                switch (port_sel) {
                case PANEL_PORT_SELECT_LVDS:
@@ -1742,7 +1742,7 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
                u32 port_sel;
 
                pp_reg = PP_CONTROL(dev_priv, 0);
-               port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
+               port_sel = intel_de_read(dev_priv, PP_ON_DELAYS(dev_priv, 0)) & PANEL_PORT_SELECT_MASK;
 
                drm_WARN_ON(&dev_priv->drm,
                            port_sel != PANEL_PORT_SELECT_LVDS);

diff --git a/drivers/gpu/drm/i915/display/intel_pps_regs.h b/drivers/gpu/drm/i915/display/intel_pps_regs.h
index e52d87b9f0ad93630cf48180f5e359fd1129acf9..8a6acefba7fe04a13925bb84959c8c04d9301b0a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_pps_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_pps_regs.h
@@ -55,7 +55,7 @@
 #define  PANEL_POWER_ON                        REG_BIT(0)
 
 #define _PP_ON_DELAYS                  0x61208
-#define PP_ON_DELAYS(pps_idx)          _MMIO_PPS(dev_priv, pps_idx, _PP_ON_DELAYS)
+#define PP_ON_DELAYS(dev_priv, pps_idx)        _MMIO_PPS(dev_priv, pps_idx, _PP_ON_DELAYS)
 #define  PANEL_PORT_SELECT_MASK                REG_GENMASK(31, 30)
 #define  PANEL_PORT_SELECT_LVDS                REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, 0)
 #define  PANEL_PORT_SELECT_DPA         REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, 1)