]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/ssi: Constify all Property
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 13 Dec 2024 16:51:05 +0000 (16:51 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Sun, 15 Dec 2024 18:56:22 +0000 (12:56 -0600)
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
hw/ssi/aspeed_smc.c
hw/ssi/ibex_spi_host.c
hw/ssi/npcm7xx_fiu.c
hw/ssi/pnv_spi.c
hw/ssi/sifive_spi.c
hw/ssi/ssi.c
hw/ssi/xilinx_spi.c
hw/ssi/xilinx_spips.c
hw/ssi/xlnx-versal-ospi.c

index 033cbbb59b06b95a918a1aaa958a522fc61f2a68..bbdd4e47869ad92d41296419b56a56e2cf90e062 100644 (file)
@@ -1287,7 +1287,7 @@ static const VMStateDescription vmstate_aspeed_smc = {
     }
 };
 
-static Property aspeed_smc_properties[] = {
+static const Property aspeed_smc_properties[] = {
     DEFINE_PROP_BOOL("inject-failure", AspeedSMCState, inject_failure, false),
     DEFINE_PROP_UINT64("dram-base", AspeedSMCState, dram_base, 0),
     DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr,
@@ -1336,7 +1336,7 @@ static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
 }
 
-static Property aspeed_smc_flash_properties[] = {
+static const Property aspeed_smc_flash_properties[] = {
     DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
     DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
                      AspeedSMCState *),
index 9e07432f7c9e45f1159dbbd32f03de333cacee05..60a0b17b628d449125bfc720b3d726d6ec625391 100644 (file)
@@ -561,7 +561,7 @@ static const MemoryRegionOps ibex_spi_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static Property ibex_spi_properties[] = {
+static const Property ibex_spi_properties[] = {
     DEFINE_PROP_UINT32("num_cs", IbexSPIHostState, num_cs, 1),
     DEFINE_PROP_END_OF_LIST(),
 };
index 119c38c41568e23dce1963dfea10db713db37ee4..fdd3ad2fdc74d4c4b48a46ce23b7406894ccd69c 100644 (file)
@@ -541,7 +541,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = {
     },
 };
 
-static Property npcm7xx_fiu_properties[] = {
+static const Property npcm7xx_fiu_properties[] = {
     DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
index c21b2ebb3c2e67eac388cb8f2854fb9ddaaa65b3..4ca9c469a4bb166eb07b2e93dbbd5f51daabfa6f 100644 (file)
@@ -1195,7 +1195,7 @@ static const MemoryRegionOps pnv_spi_xscom_ops = {
     .endianness = DEVICE_BIG_ENDIAN,
 };
 
-static Property pnv_spi_properties[] = {
+static const Property pnv_spi_properties[] = {
     DEFINE_PROP_UINT32("spic_num", PnvSpi, spic_num, 0),
     DEFINE_PROP_UINT8("transfer_len", PnvSpi, transfer_len, 4),
     DEFINE_PROP_END_OF_LIST(),
index 08a107792b6f160cf8ae55e0e6621c4ab2cd20d5..7458747779316a34470619d0b969fceee74cc60f 100644 (file)
@@ -328,7 +328,7 @@ static void sifive_spi_realize(DeviceState *dev, Error **errp)
     fifo8_create(&s->rx_fifo, FIFO_CAPACITY);
 }
 
-static Property sifive_spi_properties[] = {
+static const Property sifive_spi_properties[] = {
     DEFINE_PROP_UINT32("num-cs", SiFiveSPIState, num_cs, 1),
     DEFINE_PROP_END_OF_LIST(),
 };
index 3f357e8f16abaa259e7766cb6c8274b3d964c17c..cab0014c3f0929b99d6bcdda41b766d892c0de7f 100644 (file)
@@ -108,7 +108,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
     ssc->realize(s, errp);
 }
 
-static Property ssi_peripheral_properties[] = {
+static const Property ssi_peripheral_properties[] = {
     DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
index 7f1e1808c51194b82fd4f2593be7fbe6ad72f31a..588c1ec071c16cab0a52ecba47e8bb9395432a09 100644 (file)
@@ -361,7 +361,7 @@ static const VMStateDescription vmstate_xilinx_spi = {
     }
 };
 
-static Property xilinx_spi_properties[] = {
+static const Property xilinx_spi_properties[] = {
     DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1),
     DEFINE_PROP_END_OF_LIST(),
 };
index aeb462c3cec7ce6394991570d85c6b36bc0062f7..f72cb3cbc876b76fe706594e861acd9573f497dd 100644 (file)
@@ -1420,12 +1420,12 @@ static const VMStateDescription vmstate_xlnx_zynqmp_qspips = {
     }
 };
 
-static Property xilinx_zynqmp_qspips_properties[] = {
+static const Property xilinx_zynqmp_qspips_properties[] = {
     DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size, 64),
     DEFINE_PROP_END_OF_LIST(),
 };
 
-static Property xilinx_spips_properties[] = {
+static const Property xilinx_spips_properties[] = {
     DEFINE_PROP_UINT8("num-busses", XilinxSPIPS, num_busses, 1),
     DEFINE_PROP_UINT8("num-ss-bits", XilinxSPIPS, num_cs, 4),
     DEFINE_PROP_UINT8("num-txrx-bytes", XilinxSPIPS, num_txrx_bytes, 1),
index ecc1903b8ec93a0b82b9dc779fd5831f741bcbd1..e51abe9de2cb2a7a3b391075d358fa9886a532e2 100644 (file)
@@ -1825,7 +1825,7 @@ static const VMStateDescription vmstate_xlnx_versal_ospi = {
     }
 };
 
-static Property xlnx_versal_ospi_properties[] = {
+static const Property xlnx_versal_ospi_properties[] = {
     DEFINE_PROP_BOOL("dac-with-indac", XlnxVersalOspi, dac_with_indac, false),
     DEFINE_PROP_BOOL("indac-write-disabled", XlnxVersalOspi,
                      ind_write_disabled, false),