Merge branch 'pci/controller/brcmstb'

- Add optional DT 'num-lanes' property and if present, use it to override
  the Maximum Link Width advertised in Link Capabilities (Jim Quinlan)

* pci/controller/brcmstb:
  PCI: brcmstb: Replace open coded value with PCIE_T_RRS_READY_MS
  MAINTAINERS: Drop Nicolas from maintaining pcie-brcmstb
  PCI: brcmstb: Set MLW based on "num-lanes" DT property if present
  dt-bindings: PCI: brcm,stb-pcie: Add num-lanes property

diff --cc MAINTAINERS
Simple merge

diff --cc drivers/pci/controller/pcie-brcmstb.c
index 912a3cf86134098053c99d23cb29fcc8ef150a31,db7402bb6291cca780351395dcb3b71ee674fa71..b664d8bcd198daabcb49a0acd098ba60d2761a81
--- 1/drivers/pci/controller/pcie-brcmstb.c
--- 2/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@@ -1332,11 -1358,7 +1357,7 @@@ static int brcm_pcie_start_link(struct 
        if (ret)
                return ret;
  
-       /*
-        * Wait for 100ms after PERST# deassertion; see PCIe CEM specification
-        * sections 2.2, PCIe r5.0, 6.6.1.
-        */
-       msleep(100);
 -      msleep(PCIE_T_RRS_READY_MS);
++      msleep(PCIE_RESET_CONFIG_WAIT_MS);
  
        /*
         * Give the RC/EP even more time to wake up, before trying to