arm64: dts: s32g: Add device tree information for the OCOTP driver

Add the device tree information for the S32G On Chip One-Time
Programmable Controller (OCOTP) chip.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 3ff3b2ff09beb60843e7e113a2ab747eb66f5cdc..d167624d1f0cb2feadb751136ed0d2b568440a5a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -325,6 +325,13 @@
                        };
                };
 
+               ocotp: nvmem@400a4000 {
+                       compatible = "nxp,s32g2-ocotp";
+                       reg = <0x400a4000 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+
                swt0: watchdog@40100000 {
                        compatible = "nxp,s32g2-swt";
                        reg = <0x40100000 0x1000>;

diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index 6292ae99883ab692da0ff1702dbd4aecc4c60790..be3a582ebc1bf490705d03bf4eb2c300fca5e4a4 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -383,6 +383,13 @@
                        };
                };
 
+               ocotp: nvmem@400a4000 {
+                       compatible = "nxp,s32g3-ocotp", "nxp,s32g2-ocotp";
+                       reg = <0x400a4000 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+
                swt0: watchdog@40100000 {
                        compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";
                        reg = <0x40100000 0x1000>;