#include "panthor_device.h"
#include "panthor_gem.h"
+#include "panthor_gpu.h"
#include "panthor_heap.h"
#include "panthor_mmu.h"
#include "panthor_regs.h"
write_cmd(ptdev, as_nr, AS_COMMAND_LOCK);
}
+static int mmu_hw_do_flush_on_gpu_ctrl(struct panthor_device *ptdev, int as_nr,
+ u32 op)
+{
+ const u32 l2_flush_op = CACHE_CLEAN | CACHE_INV;
+ u32 lsc_flush_op = 0;
+ int ret;
+
+ if (op == AS_COMMAND_FLUSH_MEM)
+ lsc_flush_op = CACHE_CLEAN | CACHE_INV;
+
+ ret = wait_ready(ptdev, as_nr);
+ if (ret)
+ return ret;
+
+ ret = panthor_gpu_flush_caches(ptdev, l2_flush_op, lsc_flush_op, 0);
+ if (ret)
+ return ret;
+
+ /*
+ * Explicitly unlock the region as the AS is not unlocked automatically
+ * at the end of the GPU_CONTROL cache flush command, unlike
+ * AS_COMMAND_FLUSH_MEM or AS_COMMAND_FLUSH_PT.
+ */
+ write_cmd(ptdev, as_nr, AS_COMMAND_UNLOCK);
+
+ /* Wait for the unlock command to complete */
+ return wait_ready(ptdev, as_nr);
+}
+
static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
u64 iova, u64 size, u32 op)
{
if (op != AS_COMMAND_UNLOCK)
lock_region(ptdev, as_nr, iova, size);
+ if (op == AS_COMMAND_FLUSH_MEM || op == AS_COMMAND_FLUSH_PT)
+ return mmu_hw_do_flush_on_gpu_ctrl(ptdev, as_nr, op);
+
/* Run the MMU operation */
write_cmd(ptdev, as_nr, op);