--- /dev/null
+From 1510a97182b4ddb5fe3c4e8d05240f7cd6fd13e7 Mon Sep 17 00:00:00 2001
+From: Yuanhan Liu <yuanhan.liu@intel.com>
+Date: Fri, 8 Oct 2010 10:18:01 +0100
+Subject: drm/i915/crt: Make sure the hotplug interrupt is enabled
+
+From: Yuanhan Liu <yuanhan.liu@intel.com>
+
+commit 1510a97182b4ddb5fe3c4e8d05240f7cd6fd13e7 upstream.
+
+After disabling the hotplug interrupts for VGA detection on Ironlake, be
+sure to re-enable them again afterwards.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30378
+Signed-off-by: Yuanhan Liu <yuanhan.liu@intel.com>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/intel_crt.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_crt.c
++++ b/drivers/gpu/drm/i915/intel_crt.c
+@@ -191,7 +191,8 @@ static bool intel_ironlake_crt_detect_ho
+ DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
+
+ if (turn_off_dac) {
+- I915_WRITE(PCH_ADPA, temp);
++ /* Make sure hotplug is enabled */
++ I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE);
+ (void)I915_READ(PCH_ADPA);
+ }
+
--- /dev/null
+From 382b09362711d7d03272230a33767015a277926e Mon Sep 17 00:00:00 2001
+From: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date: Thu, 7 Oct 2010 16:01:25 -0700
+Subject: drm/i915: diasable clock gating for the panel power sequencer
+
+From: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 382b09362711d7d03272230a33767015a277926e upstream.
+
+Needed on Ibex Peak and Cougar Point or the panel won't always come on.
+
+Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h | 3 +++
+ drivers/gpu/drm/i915/intel_display.c | 7 +++++++
+ 2 files changed, 10 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -2726,6 +2726,9 @@
+ #define FDI_RXB_CHICKEN 0xc2010
+ #define FDI_RX_PHASE_SYNC_POINTER_ENABLE (1)
+
++#define SOUTH_DSPCLK_GATE_D 0xc2020
++#define PCH_DPLSUNIT_CLOCK_GATE_DISABLE (1<<29)
++
+ /* CPU: FDI_TX */
+ #define FDI_TXA_CTL 0x60100
+ #define FDI_TXB_CTL 0x61100
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -5674,6 +5674,13 @@ void intel_init_clock_gating(struct drm_
+ I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);
+
+ /*
++ * On Ibex Peak and Cougar Point, we need to disable clock
++ * gating for the panel power sequencer or it will fail to
++ * start up when no ports are active.
++ */
++ I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
++
++ /*
+ * According to the spec the following bits should be set in
+ * order to enable memory self-refresh
+ * The bit 22/21 of 0x42004
--- /dev/null
+From 19966754328d99ee003ddfc7a8c31ceb115483ac Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Mon, 6 Sep 2010 20:08:44 +0200
+Subject: drm/i915: die, i915_probe_agp, die
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 19966754328d99ee003ddfc7a8c31ceb115483ac upstream.
+
+Use the detection from intel-gtt.ko instead. Hooray!
+
+Also move the stolen mem allocator to the other gtt stuff in dev_prv->mem.
+
+v2: Chris Wilson noted that my error handling was crap. Fix it. He also
+said that this fixes a problem on his i845. Indeed, i915_probe_agp
+misses a special case for i830/i845 stolen mem detection.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=25476
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
+index 6eb64c1..9cb7c98 100644
+--- a/drivers/char/agp/intel-gtt.c
++++ b/drivers/char/agp/intel-gtt.c
+@@ -1714,6 +1714,12 @@ int intel_gmch_probe(struct pci_dev *pdev,
+ }
+ EXPORT_SYMBOL(intel_gmch_probe);
+
++struct intel_gtt *intel_gtt_get(void)
++{
++ return &intel_private.base;
++}
++EXPORT_SYMBOL(intel_gtt_get);
++
+ void intel_gmch_remove(struct pci_dev *pdev)
+ {
+ if (intel_private.pcidev)
+diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
+index a693b27..428c75b 100644
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -989,172 +989,6 @@ intel_teardown_mchbar(struct drm_device *dev)
+ release_resource(&dev_priv->mch_res);
+ }
+
+-/**
+- * i915_probe_agp - get AGP bootup configuration
+- * @pdev: PCI device
+- * @aperture_size: returns AGP aperture configured size
+- * @preallocated_size: returns size of BIOS preallocated AGP space
+- *
+- * Since Intel integrated graphics are UMA, the BIOS has to set aside
+- * some RAM for the framebuffer at early boot. This code figures out
+- * how much was set aside so we can use it for our own purposes.
+- */
+-static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
+- uint32_t *preallocated_size)
+-{
+- struct drm_i915_private *dev_priv = dev->dev_private;
+- u16 tmp = 0;
+- unsigned long overhead;
+- unsigned long stolen;
+-
+- /* Get the fb aperture size and "stolen" memory amount. */
+- pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &tmp);
+-
+- *aperture_size = 1024 * 1024;
+- *preallocated_size = 1024 * 1024;
+-
+- switch (dev->pdev->device) {
+- case PCI_DEVICE_ID_INTEL_82830_CGC:
+- case PCI_DEVICE_ID_INTEL_82845G_IG:
+- case PCI_DEVICE_ID_INTEL_82855GM_IG:
+- case PCI_DEVICE_ID_INTEL_82865_IG:
+- if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
+- *aperture_size *= 64;
+- else
+- *aperture_size *= 128;
+- break;
+- default:
+- /* 9xx supports large sizes, just look at the length */
+- *aperture_size = pci_resource_len(dev->pdev, 2);
+- break;
+- }
+-
+- /*
+- * Some of the preallocated space is taken by the GTT
+- * and popup. GTT is 1K per MB of aperture size, and popup is 4K.
+- */
+- if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev))
+- overhead = 4096;
+- else
+- overhead = (*aperture_size / 1024) + 4096;
+-
+- if (IS_GEN6(dev)) {
+- /* SNB has memory control reg at 0x50.w */
+- pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &tmp);
+-
+- switch (tmp & SNB_GMCH_GMS_STOLEN_MASK) {
+- case INTEL_855_GMCH_GMS_DISABLED:
+- DRM_ERROR("video memory is disabled\n");
+- return -1;
+- case SNB_GMCH_GMS_STOLEN_32M:
+- stolen = 32 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_64M:
+- stolen = 64 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_96M:
+- stolen = 96 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_128M:
+- stolen = 128 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_160M:
+- stolen = 160 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_192M:
+- stolen = 192 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_224M:
+- stolen = 224 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_256M:
+- stolen = 256 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_288M:
+- stolen = 288 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_320M:
+- stolen = 320 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_352M:
+- stolen = 352 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_384M:
+- stolen = 384 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_416M:
+- stolen = 416 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_448M:
+- stolen = 448 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_480M:
+- stolen = 480 * 1024 * 1024;
+- break;
+- case SNB_GMCH_GMS_STOLEN_512M:
+- stolen = 512 * 1024 * 1024;
+- break;
+- default:
+- DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
+- tmp & SNB_GMCH_GMS_STOLEN_MASK);
+- return -1;
+- }
+- } else {
+- switch (tmp & INTEL_GMCH_GMS_MASK) {
+- case INTEL_855_GMCH_GMS_DISABLED:
+- DRM_ERROR("video memory is disabled\n");
+- return -1;
+- case INTEL_855_GMCH_GMS_STOLEN_1M:
+- stolen = 1 * 1024 * 1024;
+- break;
+- case INTEL_855_GMCH_GMS_STOLEN_4M:
+- stolen = 4 * 1024 * 1024;
+- break;
+- case INTEL_855_GMCH_GMS_STOLEN_8M:
+- stolen = 8 * 1024 * 1024;
+- break;
+- case INTEL_855_GMCH_GMS_STOLEN_16M:
+- stolen = 16 * 1024 * 1024;
+- break;
+- case INTEL_855_GMCH_GMS_STOLEN_32M:
+- stolen = 32 * 1024 * 1024;
+- break;
+- case INTEL_915G_GMCH_GMS_STOLEN_48M:
+- stolen = 48 * 1024 * 1024;
+- break;
+- case INTEL_915G_GMCH_GMS_STOLEN_64M:
+- stolen = 64 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_128M:
+- stolen = 128 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_256M:
+- stolen = 256 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_96M:
+- stolen = 96 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_160M:
+- stolen = 160 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_224M:
+- stolen = 224 * 1024 * 1024;
+- break;
+- case INTEL_GMCH_GMS_STOLEN_352M:
+- stolen = 352 * 1024 * 1024;
+- break;
+- default:
+- DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
+- tmp & INTEL_GMCH_GMS_MASK);
+- return -1;
+- }
+- }
+-
+- *preallocated_size = stolen - overhead;
+-
+- return 0;
+-}
+-
+ #define PTE_ADDRESS_MASK 0xfffff000
+ #define PTE_ADDRESS_MASK_HIGH 0x000000f0 /* i915+ */
+ #define PTE_MAPPING_TYPE_UNCACHED (0 << 1)
+@@ -1249,7 +1083,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
+ unsigned long ll_base = 0;
+
+ /* Leave 1M for line length buffer & misc. */
+- compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
++ compressed_fb = drm_mm_search_free(&dev_priv->mm.vram, size, 4096, 0);
+ if (!compressed_fb) {
+ dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
+ i915_warn_stolen(dev);
+@@ -1270,7 +1104,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
+ }
+
+ if (!(IS_GM45(dev) || IS_IRONLAKE_M(dev))) {
+- compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096,
++ compressed_llb = drm_mm_search_free(&dev_priv->mm.vram, 4096,
+ 4096, 0);
+ if (!compressed_llb) {
+ i915_warn_stolen(dev);
+@@ -1366,8 +1200,8 @@ static int i915_load_modeset_init(struct drm_device *dev,
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int ret = 0;
+
+- /* Basic memrange allocator for stolen space (aka vram) */
+- drm_mm_init(&dev_priv->vram, 0, prealloc_size);
++ /* Basic memrange allocator for stolen space (aka mm.vram) */
++ drm_mm_init(&dev_priv->mm.vram, 0, prealloc_size);
+ DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
+
+ /* We're off and running w/KMS */
+@@ -2107,16 +1941,16 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
+ "performance may suffer.\n");
+ }
+
+- ret = i915_probe_agp(dev, &agp_size, &prealloc_size);
+- if (ret)
++ dev_priv->mm.gtt = intel_gtt_get();
++ if (!dev_priv->mm.gtt) {
++ DRM_ERROR("Failed to initialize GTT\n");
++ ret = -ENODEV;
+ goto out_iomapfree;
+-
+- if (prealloc_size > intel_max_stolen) {
+- DRM_INFO("detected %dM stolen memory, trimming to %dM\n",
+- prealloc_size >> 20, intel_max_stolen >> 20);
+- prealloc_size = intel_max_stolen;
+ }
+
++ prealloc_size = dev_priv->mm.gtt->gtt_stolen_entries << PAGE_SHIFT;
++ agp_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
++
+ dev_priv->wq = create_singlethread_workqueue("i915");
+ if (dev_priv->wq == NULL) {
+ DRM_ERROR("Failed to create our workqueue.\n");
+@@ -2301,7 +2135,7 @@ int i915_driver_unload(struct drm_device *dev)
+ mutex_unlock(&dev->struct_mutex);
+ if (I915_HAS_FBC(dev) && i915_powersave)
+ i915_cleanup_compression(dev);
+- drm_mm_takedown(&dev_priv->vram);
++ drm_mm_takedown(&dev_priv->mm.vram);
+
+ intel_cleanup_overlay(dev);
+ }
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index d825ef2..c8b2200 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -305,8 +305,6 @@ typedef struct drm_i915_private {
+ uint32_t last_instdone;
+ uint32_t last_instdone1;
+
+- struct drm_mm vram;
+-
+ unsigned long cfb_size;
+ unsigned long cfb_pitch;
+ int cfb_fence;
+@@ -511,6 +509,11 @@ typedef struct drm_i915_private {
+ u32 saveMCHBAR_RENDER_STANDBY;
+
+ struct {
++ /** Bridge to intel-gtt-ko */
++ struct intel_gtt *gtt;
++ /** Memory allocator for GTT stolen memory */
++ struct drm_mm vram;
++ /** Memory allocator for GTT */
+ struct drm_mm gtt_space;
+
+ struct io_mapping *gtt_mapping;
+diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
+index 6769cb7..b3aa7ab 100644
+--- a/include/drm/intel-gtt.h
++++ b/include/drm/intel-gtt.h
+@@ -14,5 +14,7 @@ struct intel_gtt {
+ unsigned int gtt_mappable_entries;
+ };
+
++struct intel_gtt *intel_gtt_get(void);
++
+ #endif
+
--- /dev/null
+From c2873e9633fe908dccd36dbb1d370e9c59a1ca62 Mon Sep 17 00:00:00 2001
+From: Keith Packard <keithp@keithp.com>
+Date: Thu, 7 Oct 2010 09:20:12 +0100
+Subject: drm/i915: Free hardware status page on unload when physically mapped
+
+From: Keith Packard <keithp@keithp.com>
+
+commit c2873e9633fe908dccd36dbb1d370e9c59a1ca62 upstream.
+
+A physically mapped hardware status page is allocated at driver load
+time but was never freed. Call the existing code to free this page at
+driver unload time on hardware which uses this kind.
+
+Signed-off-by: Keith Packard <keithp@keithp.com>
+[ickle: call before tearing down registers on KMS-only path, as pointed
+out by Dave Airlie]
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_dma.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -2306,6 +2306,9 @@ int i915_driver_unload(struct drm_device
+ i915_gem_lastclose(dev);
+
+ intel_cleanup_overlay(dev);
++
++ if (!I915_NEED_GFX_HWS(dev))
++ i915_free_hws(dev);
+ }
+
+ intel_teardown_mchbar(dev);
--- /dev/null
+From 0ddc1289f3ffd779779ddd3922f26ae7d0a21604 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu, 12 Aug 2010 09:35:00 +0100
+Subject: drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing.
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 0ddc1289f3ffd779779ddd3922f26ae7d0a21604 upstream.
+
+Just makes sure that writes are not being aliased by the CPU cache and
+do make it out to main memory.
+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24977
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/intel_overlay.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_overlay.c
++++ b/drivers/gpu/drm/i915/intel_overlay.c
+@@ -1367,6 +1367,12 @@ void intel_setup_overlay(struct drm_devi
+ goto out_free_bo;
+ }
+ overlay->flip_addr = overlay->reg_bo->gtt_offset;
++
++ ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
++ if (ret) {
++ DRM_ERROR("failed to move overlay register bo into the GTT\n");
++ goto out_unpin_bo;
++ }
+ } else {
+ ret = i915_gem_attach_phys_object(dev, reg_bo,
+ I915_GEM_PHYS_OVERLAY_REGS,
+@@ -1399,6 +1405,8 @@ void intel_setup_overlay(struct drm_devi
+ DRM_INFO("initialized overlay support\n");
+ return;
+
++out_unpin_bo:
++ i915_gem_object_unpin(reg_bo);
+ out_free_bo:
+ drm_gem_object_unreference(reg_bo);
+ out_free:
--- /dev/null
+From 2d7b8366ae4a9ec2183c30e432a4a9a495c82bcd Mon Sep 17 00:00:00 2001
+From: Yuanhan Liu <yuanhan.liu@intel.com>
+Date: Fri, 8 Oct 2010 10:21:06 +0100
+Subject: drm/i915: Update hotplug interrupts register definitions for Sandybridge
+
+From: Yuanhan Liu <yuanhan.liu@intel.com>
+
+commit 2d7b8366ae4a9ec2183c30e432a4a9a495c82bcd upstream.
+
+On Sandybridge, the bit definition for hotplug on SDE has changed, so
+update the code to new definition.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30378
+Signed-off-by: Yuanhan Liu <yuanhan.liu@intel.com>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_irq.c | 21 ++++++++++++++++-----
+ drivers/gpu/drm/i915/i915_reg.h | 4 ++++
+ 2 files changed, 20 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_irq.c
++++ b/drivers/gpu/drm/i915/i915_irq.c
+@@ -310,6 +310,7 @@ irqreturn_t ironlake_irq_handler(struct
+ drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+ int ret = IRQ_NONE;
+ u32 de_iir, gt_iir, de_ier, pch_iir;
++ u32 hotplug_mask;
+ struct drm_i915_master_private *master_priv;
+ struct intel_ring_buffer *render_ring = &dev_priv->render_ring;
+
+@@ -325,6 +326,11 @@ irqreturn_t ironlake_irq_handler(struct
+ if (de_iir == 0 && gt_iir == 0 && pch_iir == 0)
+ goto done;
+
++ if (HAS_PCH_CPT(dev))
++ hotplug_mask = SDE_HOTPLUG_MASK_CPT;
++ else
++ hotplug_mask = SDE_HOTPLUG_MASK;
++
+ ret = IRQ_HANDLED;
+
+ if (dev->primary->master) {
+@@ -366,10 +372,8 @@ irqreturn_t ironlake_irq_handler(struct
+ drm_handle_vblank(dev, 1);
+
+ /* check event from PCH */
+- if ((de_iir & DE_PCH_EVENT) &&
+- (pch_iir & SDE_HOTPLUG_MASK)) {
++ if ((de_iir & DE_PCH_EVENT) && (pch_iir & hotplug_mask))
+ queue_work(dev_priv->wq, &dev_priv->hotplug_work);
+- }
+
+ if (de_iir & DE_PCU_EVENT) {
+ I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS));
+@@ -1424,8 +1428,7 @@ static int ironlake_irq_postinstall(stru
+ u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
+ DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE;
+ u32 render_mask = GT_PIPE_NOTIFY | GT_BSD_USER_INTERRUPT;
+- u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
+- SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
++ u32 hotplug_mask;
+
+ dev_priv->irq_mask_reg = ~display_mask;
+ dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
+@@ -1450,6 +1453,14 @@ static int ironlake_irq_postinstall(stru
+ I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg);
+ (void) I915_READ(GTIER);
+
++ if (HAS_PCH_CPT(dev)) {
++ hotplug_mask = SDE_CRT_HOTPLUG_CPT | SDE_PORTB_HOTPLUG_CPT |
++ SDE_PORTC_HOTPLUG_CPT | SDE_PORTD_HOTPLUG_CPT ;
++ } else {
++ hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
++ SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
++ }
++
+ dev_priv->pch_irq_mask_reg = ~hotplug_mask;
+ dev_priv->pch_irq_enable_reg = hotplug_mask;
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -2551,6 +2551,10 @@
+ #define SDE_PORTD_HOTPLUG_CPT (1 << 23)
+ #define SDE_PORTC_HOTPLUG_CPT (1 << 22)
+ #define SDE_PORTB_HOTPLUG_CPT (1 << 21)
++#define SDE_HOTPLUG_MASK_CPT (SDE_CRT_HOTPLUG_CPT | \
++ SDE_PORTD_HOTPLUG_CPT | \
++ SDE_PORTC_HOTPLUG_CPT | \
++ SDE_PORTB_HOTPLUG_CPT)
+
+ #define SDEISR 0xc4000
+ #define SDEIMR 0xc4004
--- /dev/null
+From 43b93fbffc2c080dba2e84df6fce8d7e6c0a2581 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed, 27 Oct 2010 01:02:35 -0400
+Subject: drm/radeon/kms: fix handling of tex lookup disable in cs checker on r2xx
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 43b93fbffc2c080dba2e84df6fce8d7e6c0a2581 upstream.
+
+There are cases when multiple texture units have to be enabled,
+but not actually used to sample. This patch checks to see if
+the lookup_disable bit is set and if so, skips the texture check.
+
+Fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=25544
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r100.c | 3 +++
+ drivers/gpu/drm/radeon/r100_track.h | 1 +
+ drivers/gpu/drm/radeon/r200.c | 2 ++
+ drivers/gpu/drm/radeon/radeon_reg.h | 1 +
+ 4 files changed, 7 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -3228,6 +3228,8 @@ static int r100_cs_track_texture_check(s
+ for (u = 0; u < track->num_texture; u++) {
+ if (!track->textures[u].enabled)
+ continue;
++ if (track->textures[u].lookup_disable)
++ continue;
+ robj = track->textures[u].robj;
+ if (robj == NULL) {
+ DRM_ERROR("No texture bound to unit %u\n", u);
+@@ -3462,6 +3464,7 @@ void r100_cs_track_clear(struct radeon_d
+ track->textures[i].robj = NULL;
+ /* CS IB emission code makes sure texture unit are disabled */
+ track->textures[i].enabled = false;
++ track->textures[i].lookup_disable = false;
+ track->textures[i].roundup_w = true;
+ track->textures[i].roundup_h = true;
+ if (track->separate_cube)
+--- a/drivers/gpu/drm/radeon/r100_track.h
++++ b/drivers/gpu/drm/radeon/r100_track.h
+@@ -46,6 +46,7 @@ struct r100_cs_track_texture {
+ unsigned height_11;
+ bool use_pitch;
+ bool enabled;
++ bool lookup_disable;
+ bool roundup_w;
+ bool roundup_h;
+ unsigned compress_format;
+--- a/drivers/gpu/drm/radeon/r200.c
++++ b/drivers/gpu/drm/radeon/r200.c
+@@ -447,6 +447,8 @@ int r200_packet0_check(struct radeon_cs_
+ track->textures[i].width = 1 << ((idx_value >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK);
+ track->textures[i].height = 1 << ((idx_value >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK);
+ }
++ if (idx_value & R200_TXFORMAT_LOOKUP_DISABLE)
++ track->textures[i].lookup_disable = true;
+ switch ((idx_value & RADEON_TXFORMAT_FORMAT_MASK)) {
+ case R200_TXFORMAT_I8:
+ case R200_TXFORMAT_RGB332:
+--- a/drivers/gpu/drm/radeon/radeon_reg.h
++++ b/drivers/gpu/drm/radeon/radeon_reg.h
+@@ -2836,6 +2836,7 @@
+ # define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24)
+ # define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24)
+ # define R200_TXFORMAT_ST_ROUTE_SHIFT 24
++# define R200_TXFORMAT_LOOKUP_DISABLE (1 << 27)
+ # define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28)
+ # define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29)
+ # define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30)
--- /dev/null
+From 2126d0a4a205e2d6b763434f892524cd60f74228 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed, 6 Oct 2010 00:13:04 -0400
+Subject: drm/radeon/kms: make sure blit addr masks are 64 bit
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 2126d0a4a205e2d6b763434f892524cd60f74228 upstream.
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r600_blit_kms.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
++++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
+@@ -650,8 +650,8 @@ void r600_kms_blit_copy(struct radeon_de
+ int src_x = src_gpu_addr & 255;
+ int dst_x = dst_gpu_addr & 255;
+ int h = 1;
+- src_gpu_addr = src_gpu_addr & ~255;
+- dst_gpu_addr = dst_gpu_addr & ~255;
++ src_gpu_addr = src_gpu_addr & ~255ULL;
++ dst_gpu_addr = dst_gpu_addr & ~255ULL;
+
+ if (!src_x && !dst_x) {
+ h = (cur_size / max_bytes);
+@@ -744,8 +744,8 @@ void r600_kms_blit_copy(struct radeon_de
+ int src_x = (src_gpu_addr & 255);
+ int dst_x = (dst_gpu_addr & 255);
+ int h = 1;
+- src_gpu_addr = src_gpu_addr & ~255;
+- dst_gpu_addr = dst_gpu_addr & ~255;
++ src_gpu_addr = src_gpu_addr & ~255ULL;
++ dst_gpu_addr = dst_gpu_addr & ~255ULL;
+
+ if (!src_x && !dst_x) {
+ h = (cur_size / max_bytes);
--- /dev/null
+From b7d8cce5b558e0c0aa6898c9865356481598b46d Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon, 25 Oct 2010 19:44:00 -0400
+Subject: drm/radeon/kms: MC vram map needs to be >= pci aperture size
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit b7d8cce5b558e0c0aa6898c9865356481598b46d upstream.
+
+The vram map in the radeon memory controller needs to be
+>= the pci aperture size. Fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=28402
+
+The problematic cards in the above bug have 64 MB of vram,
+but the pci aperture is 128 MB and the MC vram map was only
+64 MB. This can lead to hangs.
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r100.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -2318,6 +2318,9 @@ void r100_vram_init_sizes(struct radeon_
+ /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
+ * Novell bug 204882 + along with lots of ubuntu ones
+ */
++ if (rdev->mc.aper_size > config_aper_size)
++ config_aper_size = rdev->mc.aper_size;
++
+ if (config_aper_size > rdev->mc.real_vram_size)
+ rdev->mc.mc_vram_size = config_aper_size;
+ else
--- /dev/null
+From 881fe6c1d06bf49f4ab7aef212cdaf66bd059614 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon, 18 Oct 2010 23:54:56 -0400
+Subject: drm/radeon/kms: properly compute group_size on 6xx/7xx
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 881fe6c1d06bf49f4ab7aef212cdaf66bd059614 upstream.
+
+Needed for tiled surfaces.
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r600.c | 7 +++++--
+ drivers/gpu/drm/radeon/rv770.c | 9 +++++----
+ 2 files changed, 10 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -1608,8 +1608,11 @@ void r600_gpu_init(struct radeon_device
+ rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes;
+ rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+ tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+- tiling_config |= GROUP_SIZE(0);
+- rdev->config.r600.tiling_group_size = 256;
++ tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
++ if ((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
++ rdev->config.r600.tiling_group_size = 512;
++ else
++ rdev->config.r600.tiling_group_size = 256;
+ tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
+ if (tmp > 3) {
+ tiling_config |= ROW_TILING(3);
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -643,10 +643,11 @@ static void rv770_gpu_init(struct radeon
+ else
+ gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
+ rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
+-
+- gb_tiling_config |= GROUP_SIZE(0);
+- rdev->config.rv770.tiling_group_size = 256;
+-
++ gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
++ if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
++ rdev->config.rv770.tiling_group_size = 512;
++ else
++ rdev->config.rv770.tiling_group_size = 256;
+ if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
+ gb_tiling_config |= ROW_TILING(3);
+ gb_tiling_config |= SAMPLE_SPLIT(3);
--- /dev/null
+From bc4866b6e0b44f8ea0df22a16e5927714beb4983 Mon Sep 17 00:00:00 2001
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+Date: Mon, 4 Oct 2010 17:59:08 -0400
+Subject: NFS: Don't SIGBUS if nfs_vm_page_mkwrite races with a cache invalidation
+
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+
+commit bc4866b6e0b44f8ea0df22a16e5927714beb4983 upstream.
+
+In the case where we lock the page, and then find out that the page has
+been thrown out of the page cache, we should just return VM_FAULT_NOPAGE.
+This is what block_page_mkwrite() does in these situations.
+
+Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ fs/nfs/file.c | 17 ++++++++---------
+ 1 file changed, 8 insertions(+), 9 deletions(-)
+
+--- a/fs/nfs/file.c
++++ b/fs/nfs/file.c
+@@ -551,7 +551,7 @@ static int nfs_vm_page_mkwrite(struct vm
+ struct file *filp = vma->vm_file;
+ struct dentry *dentry = filp->f_path.dentry;
+ unsigned pagelen;
+- int ret = -EINVAL;
++ int ret = VM_FAULT_NOPAGE;
+ struct address_space *mapping;
+
+ dfprintk(PAGECACHE, "NFS: vm_page_mkwrite(%s/%s(%ld), offset %lld)\n",
+@@ -567,21 +567,20 @@ static int nfs_vm_page_mkwrite(struct vm
+ if (mapping != dentry->d_inode->i_mapping)
+ goto out_unlock;
+
+- ret = 0;
+ pagelen = nfs_page_length(page);
+ if (pagelen == 0)
+ goto out_unlock;
+
+- ret = nfs_flush_incompatible(filp, page);
+- if (ret != 0)
+- goto out_unlock;
++ ret = VM_FAULT_LOCKED;
++ if (nfs_flush_incompatible(filp, page) == 0 &&
++ nfs_updatepage(filp, page, 0, pagelen) == 0)
++ goto out;
+
+- ret = nfs_updatepage(filp, page, 0, pagelen);
++ ret = VM_FAULT_SIGBUS;
+ out_unlock:
+- if (!ret)
+- return VM_FAULT_LOCKED;
+ unlock_page(page);
+- return VM_FAULT_SIGBUS;
++out:
++ return ret;
+ }
+
+ static const struct vm_operations_struct nfs_file_vm_ops = {
--- /dev/null
+From 6eaa61496fb3b93cceface7a296415fc4c030bce Mon Sep 17 00:00:00 2001
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+Date: Mon, 4 Oct 2010 17:59:08 -0400
+Subject: NFSv4: Don't call nfs4_reclaim_complete() on receiving NFS4ERR_STALE_CLIENTID
+
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+
+commit 6eaa61496fb3b93cceface7a296415fc4c030bce upstream.
+
+If the server sends us an NFS4ERR_STALE_CLIENTID while the state management
+thread is busy reclaiming state, we do want to treat all state that wasn't
+reclaimed before the STALE_CLIENTID as if a network partition occurred (see
+the edge conditions described in RFC3530 and RFC5661).
+What we do not want to do is to send an nfs4_reclaim_complete(), since we
+haven't yet even started reclaiming state after the server rebooted.
+
+Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ fs/nfs/nfs4state.c | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+--- a/fs/nfs/nfs4state.c
++++ b/fs/nfs/nfs4state.c
+@@ -1138,16 +1138,14 @@ static void nfs4_reclaim_complete(struct
+ (void)ops->reclaim_complete(clp);
+ }
+
+-static void nfs4_state_end_reclaim_reboot(struct nfs_client *clp)
++static int nfs4_state_clear_reclaim_reboot(struct nfs_client *clp)
+ {
+ struct nfs4_state_owner *sp;
+ struct rb_node *pos;
+ struct nfs4_state *state;
+
+ if (!test_and_clear_bit(NFS4CLNT_RECLAIM_REBOOT, &clp->cl_state))
+- return;
+-
+- nfs4_reclaim_complete(clp, clp->cl_mvops->reboot_recovery_ops);
++ return 0;
+
+ for (pos = rb_first(&clp->cl_state_owners); pos != NULL; pos = rb_next(pos)) {
+ sp = rb_entry(pos, struct nfs4_state_owner, so_client_node);
+@@ -1161,6 +1159,14 @@ static void nfs4_state_end_reclaim_reboo
+ }
+
+ nfs_delegation_reap_unclaimed(clp);
++ return 1;
++}
++
++static void nfs4_state_end_reclaim_reboot(struct nfs_client *clp)
++{
++ if (!nfs4_state_clear_reclaim_reboot(clp))
++ return;
++ nfs4_reclaim_complete(clp, clp->cl_mvops->reboot_recovery_ops);
+ }
+
+ static void nfs_delegation_clear_all(struct nfs_client *clp)
+@@ -1187,7 +1193,7 @@ static int nfs4_recovery_handle_error(st
+ case -NFS4ERR_STALE_CLIENTID:
+ case -NFS4ERR_LEASE_MOVED:
+ set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state);
+- nfs4_state_end_reclaim_reboot(clp);
++ nfs4_state_clear_reclaim_reboot(clp);
+ nfs4_state_start_reclaim_reboot(clp);
+ break;
+ case -NFS4ERR_EXPIRED:
--- /dev/null
+From ae1007d37e00144b72906a4bdc47d517ae91bcc1 Mon Sep 17 00:00:00 2001
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+Date: Mon, 4 Oct 2010 17:59:08 -0400
+Subject: NFSv4: Don't call nfs4_state_mark_reclaim_reboot() from error handlers
+
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+
+commit ae1007d37e00144b72906a4bdc47d517ae91bcc1 upstream.
+
+In the case of a server reboot, the state recovery thread starts by calling
+nfs4_state_end_reclaim_reboot() in order to avoid edge conditions when
+the server reboots while the client is in the middle of recovery.
+
+However, if the client has already marked the nfs4_state as requiring
+reboot recovery, then the above behaviour will cause the recovery thread to
+treat the open as if it was part of such an edge condition: the open will
+be recovered as if it was part of a lease expiration (and all the locks
+will be lost).
+Fix is to remove the call to nfs4_state_mark_reclaim_reboot from
+nfs4_async_handle_error(), and nfs4_handle_exception(). Instead we leave it
+to the recovery thread to do this for us.
+
+Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ fs/nfs/nfs4proc.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/fs/nfs/nfs4proc.c
++++ b/fs/nfs/nfs4proc.c
+@@ -255,9 +255,6 @@ static int nfs4_handle_exception(const s
+ nfs4_state_mark_reclaim_nograce(clp, state);
+ goto do_state_recovery;
+ case -NFS4ERR_STALE_STATEID:
+- if (state == NULL)
+- break;
+- nfs4_state_mark_reclaim_reboot(clp, state);
+ case -NFS4ERR_STALE_CLIENTID:
+ case -NFS4ERR_EXPIRED:
+ goto do_state_recovery;
+@@ -3490,9 +3487,6 @@ nfs4_async_handle_error(struct rpc_task
+ nfs4_state_mark_reclaim_nograce(clp, state);
+ goto do_state_recovery;
+ case -NFS4ERR_STALE_STATEID:
+- if (state == NULL)
+- break;
+- nfs4_state_mark_reclaim_reboot(clp, state);
+ case -NFS4ERR_STALE_CLIENTID:
+ case -NFS4ERR_EXPIRED:
+ goto do_state_recovery;
--- /dev/null
+From b0ed9dbc24f1fd912b2dd08b995153cafc1d5b1c Mon Sep 17 00:00:00 2001
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+Date: Mon, 4 Oct 2010 17:59:08 -0400
+Subject: NFSv4: Fix open recovery
+
+From: Trond Myklebust <Trond.Myklebust@netapp.com>
+
+commit b0ed9dbc24f1fd912b2dd08b995153cafc1d5b1c upstream.
+
+NFSv4 open recovery is currently broken: since we do not clear the
+state->flags states before attempting recovery, we end up with the
+'can_open_cached()' function triggering. This again leads to no OPEN call
+being put on the wire.
+
+Reported-by: Sachin Prabhu <sprabhu@redhat.com>
+Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ fs/nfs/nfs4proc.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/fs/nfs/nfs4proc.c
++++ b/fs/nfs/nfs4proc.c
+@@ -1117,6 +1117,7 @@ static int nfs4_open_recover(struct nfs4
+ clear_bit(NFS_DELEGATED_STATE, &state->flags);
+ smp_rmb();
+ if (state->n_rdwr != 0) {
++ clear_bit(NFS_O_RDWR_STATE, &state->flags);
+ ret = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE, &newstate);
+ if (ret != 0)
+ return ret;
+@@ -1124,6 +1125,7 @@ static int nfs4_open_recover(struct nfs4
+ return -ESTALE;
+ }
+ if (state->n_wronly != 0) {
++ clear_bit(NFS_O_WRONLY_STATE, &state->flags);
+ ret = nfs4_open_recover_helper(opendata, FMODE_WRITE, &newstate);
+ if (ret != 0)
+ return ret;
+@@ -1131,6 +1133,7 @@ static int nfs4_open_recover(struct nfs4
+ return -ESTALE;
+ }
+ if (state->n_rdonly != 0) {
++ clear_bit(NFS_O_RDONLY_STATE, &state->flags);
+ ret = nfs4_open_recover_helper(opendata, FMODE_READ, &newstate);
+ if (ret != 0)
+ return ret;
--- /dev/null
+From 62391f97babb7fe0c769830b6f0e0bd184bd0704 Mon Sep 17 00:00:00 2001
+From: Ken Kawasaki <ken_kawasaki@spring.nifty.jp>
+Date: Fri, 29 Oct 2010 12:17:51 +0000
+Subject: pcnet_cs: add new_id
+
+From: Ken Kawasaki <ken_kawasaki@spring.nifty.jp>
+
+commit 62391f97babb7fe0c769830b6f0e0bd184bd0704 upstream.
+
+pcnet_cs:
+ add new_id: "corega Ether CF-TD" 10Base-T PCMCIA card.
+
+Signed-off-by: Ken Kawasaki <ken_kawasaki@spring.nifty.jp>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/net/pcmcia/pcnet_cs.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/pcmcia/pcnet_cs.c
++++ b/drivers/net/pcmcia/pcnet_cs.c
+@@ -1622,6 +1622,7 @@ static struct pcmcia_device_id pcnet_ids
+ PCMCIA_DEVICE_PROD_ID12("COMPU-SHACK", "FASTline PCMCIA 10/100 Fast-Ethernet", 0xfa2e424d, 0x3953d9b9),
+ PCMCIA_DEVICE_PROD_ID12("CONTEC", "C-NET(PC)C-10L", 0x21cab552, 0xf6f90722),
+ PCMCIA_DEVICE_PROD_ID12("corega", "FEther PCC-TXF", 0x0a21501a, 0xa51564a2),
++ PCMCIA_DEVICE_PROD_ID12("corega", "Ether CF-TD", 0x0a21501a, 0x6589340a),
+ PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-T", 0x5261440f, 0xfa9d85bd),
+ PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-TD", 0x5261440f, 0xc49bd73d),
+ PCMCIA_DEVICE_PROD_ID12("Corega K.K.", "corega EtherII PCC-TD", 0xd4fdcbd8, 0xc49bd73d),
--- /dev/null
+From be8c648051048bc66fbca590d00f3e8543ec32af Mon Sep 17 00:00:00 2001
+From: Arnaud Patard <arnaud.patard@rtp-net.org>
+Date: Thu, 21 Oct 2010 03:59:57 -0700
+Subject: phy/marvell: fix 88e1121 support
+
+From: Arnaud Patard <arnaud.patard@rtp-net.org>
+
+commit be8c648051048bc66fbca590d00f3e8543ec32af upstream.
+
+Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII
+rx/tx delays except that it ends up clearing rx/tx delays bit for modes
+differents that RGMII*ID. Due to this, ethernet is not working anymore
+on my guruplug server +. This patch is fixing that.
+
+Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/net/phy/marvell.c | 31 +++++++++++++++++++------------
+ 1 file changed, 19 insertions(+), 12 deletions(-)
+
+--- a/drivers/net/phy/marvell.c
++++ b/drivers/net/phy/marvell.c
+@@ -196,20 +196,27 @@ static int m88e1121_config_aneg(struct p
+ MII_88E1121_PHY_MSCR_PAGE);
+ if (err < 0)
+ return err;
+- mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
+- MII_88E1121_PHY_MSCR_DELAY_MASK;
+
+- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+- mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
+- MII_88E1121_PHY_MSCR_TX_DELAY);
+- else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
+- mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
+- else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
+- mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
++ if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
++ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
++ (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
++ (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
+
+- err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
+- if (err < 0)
+- return err;
++ mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
++ MII_88E1121_PHY_MSCR_DELAY_MASK;
++
++ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
++ mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
++ MII_88E1121_PHY_MSCR_TX_DELAY);
++ else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
++ mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
++ else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
++ mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
++
++ err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
++ if (err < 0)
++ return err;
++ }
+
+ phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
+
powerpc-fix-call-to-subpage_protection.patch
sunrpc-after-calling-xprt_release-we-must-restart-from-call_reserve.patch
microblaze-fix-build-with-make-3.82.patch
+phy-marvell-fix-88e1121-support.patch
+nfsv4-don-t-call-nfs4_reclaim_complete-on-receiving-nfs4err_stale_clientid.patch
+nfsv4-don-t-call-nfs4_state_mark_reclaim_reboot-from-error-handlers.patch
+nfsv4-fix-open-recovery.patch
+nfs-don-t-sigbus-if-nfs_vm_page_mkwrite-races-with-a-cache-invalidation.patch
+drm-radeon-kms-mc-vram-map-needs-to-be-pci-aperture-size.patch
+drm-radeon-kms-properly-compute-group_size-on-6xx-7xx.patch
+drm-i915-update-hotplug-interrupts-register-definitions-for-sandybridge.patch
+drm-radeon-kms-make-sure-blit-addr-masks-are-64-bit.patch
+drm-radeon-kms-fix-handling-of-tex-lookup-disable-in-cs-checker-on-r2xx.patch
+drm-i915-crt-make-sure-the-hotplug-interrupt-is-enabled.patch
+drm-i915-free-hardware-status-page-on-unload-when-physically-mapped.patch
+drm-i915-diasable-clock-gating-for-the-panel-power-sequencer.patch
+drm-i915-overlay-ensure-that-the-reg_bo-is-in-the-gtt-prior-to-writing.patch
+pcnet_cs-add-new_id.patch
+sh-add-missing-consts-to-sys_execve-declaration.patch
+drm-i915-die-i915_probe_agp-die.patch
--- /dev/null
+From d8b5fc01683c66060edc202d6bb5635365822181 Mon Sep 17 00:00:00 2001
+From: David Howells <dhowells@redhat.com>
+Date: Thu, 7 Oct 2010 14:08:52 +0100
+Subject: SH: Add missing consts to sys_execve() declaration
+
+From: David Howells <dhowells@redhat.com>
+
+commit d8b5fc01683c66060edc202d6bb5635365822181 upstream.
+
+Add missing consts to the sys_execve() declaration which result in the
+following error:
+
+arch/sh/kernel/process_32.c:303: error: conflicting types for 'sys_execve'
+/warthog/nfs/linux-2.6-fscache/arch/sh/include/asm/syscalls_32.h:24: error: previous declaration of 'sys_execve' was here
+
+Signed-off-by: David Howells <dhowells@redhat.com>
+Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/sh/include/asm/syscalls_32.h | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/arch/sh/include/asm/syscalls_32.h
++++ b/arch/sh/include/asm/syscalls_32.h
+@@ -19,9 +19,10 @@ asmlinkage int sys_clone(unsigned long c
+ asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
+-asmlinkage int sys_execve(const char __user *ufilename, char __user * __user *uargv,
+- char __user * __user *uenvp, unsigned long r7,
+- struct pt_regs __regs);
++asmlinkage int sys_execve(const char __user *ufilename,
++ const char __user *const __user *uargv,
++ const char __user *const __user *uenvp,
++ unsigned long r7, struct pt_regs __regs);
+ asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5,
+ unsigned long r6, unsigned long r7,
+ struct pt_regs __regs);
projects / thirdparty / kernel / stable-queue.git / commitdiff
