IBM Z: Fix 5 tests in 31-bit mode

gcc/testsuite/ChangeLog:

	* gcc.target/s390/global-array-element-pic2.c: Add -mzarch, add
	an expectation for 31-bit mode.
	* gcc.target/s390/load-imm64-1.c: Use unsigned long long.
	* gcc.target/s390/load-imm64-2.c: Likewise.
	* gcc.target/s390/vector/long-double-vx-macro-off-on.c: Use
	-mzarch.
	* gcc.target/s390/vector/long-double-vx-macro-on-off.c:
	Likewise.

diff --git a/gcc/testsuite/gcc.target/s390/global-array-element-pic2.c b/gcc/testsuite/gcc.target/s390/global-array-element-pic2.c
index 72b87d40b85596111cc552d989a030025e0bb7ae..0ee10841cac5cfefcad3896dae912391a308fe10 100644 (file)
--- a/gcc/testsuite/gcc.target/s390/global-array-element-pic2.c
+++ b/gcc/testsuite/gcc.target/s390/global-array-element-pic2.c
@@ -1,6 +1,6 @@
 /* Test accesses to global array elements in PIC code.  */
 /* { dg-do compile } */
-/* { dg-options "-O1 -march=z10 -fPIC" } */
+/* { dg-options "-O1 -march=z10 -mzarch -fPIC" } */
 
 extern char a[] __attribute__ ((aligned (2)));
 extern char *b;
@@ -8,6 +8,7 @@ extern char *b;
 void c()
 {
   b = a + 4;
-  /* { dg-final { scan-assembler "(?n)\n\tlgrl\t%r\\d+,a@GOTENT\n" } } */
+  /* { dg-final { scan-assembler "(?n)\n\tlgrl\t%r\\d+,a@GOTENT\n" { target lp64 } } } */
+  /* { dg-final { scan-assembler "(?n)\n\tlrl\t%r\\d+,a@GOTENT\n" { target { ! lp64 } } } } */
   /* { dg-final { scan-assembler-not "(?n)\n\tlarl\t%r\\d+,a\[^@\]" } } */
 }

diff --git a/gcc/testsuite/gcc.target/s390/load-imm64-1.c b/gcc/testsuite/gcc.target/s390/load-imm64-1.c
index 03d17f5909688f1adb73c3e4ce926f1f0a209803..8e812f2f01d3b6acdb267a265e3dd360105982a4 100644 (file)
--- a/gcc/testsuite/gcc.target/s390/load-imm64-1.c
+++ b/gcc/testsuite/gcc.target/s390/load-imm64-1.c
@@ -4,10 +4,10 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=z9-109" } */
 
-unsigned long
+unsigned long long
 magic (void)
 {
-  return 0x3f08c5392f756cd;
+  return 0x3f08c5392f756cdULL;
 }
 
 /* { dg-final { scan-assembler-times {\n\tllihf\t} 1 { target lp64 } } } */

diff --git a/gcc/testsuite/gcc.target/s390/load-imm64-2.c b/gcc/testsuite/gcc.target/s390/load-imm64-2.c
index ee0ff3b0a9148085dc048fdc7da6e64daba39854..c3536b4d03100be17ce50bf006d52c939b0560f8 100644 (file)
--- a/gcc/testsuite/gcc.target/s390/load-imm64-2.c
+++ b/gcc/testsuite/gcc.target/s390/load-imm64-2.c
@@ -4,10 +4,10 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=z10" } */
 
-unsigned long
+unsigned long long
 magic (void)
 {
-  return 0x3f08c5392f756cd;
+  return 0x3f08c5392f756cdULL;
 }
 
 /* { dg-final { scan-assembler-times {\n\tllihf\t} 1 { target lp64 } } } */

diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-off-on.c b/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-off-on.c
index 2d67679bb111f7da09ba7d40b0e16413d2aa911a..513912e669de87e49a86d40a9d2e1a2d2ca841a9 100644 (file)
--- a/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-off-on.c
+++ b/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-off-on.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target target_attribute } */
-/* { dg-options "-march=z14" } */
+/* { dg-options "-march=z14 -mzarch" } */
 #if !defined(__LONG_DOUBLE_VX__)
 #error
 #endif

diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-on-off.c b/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-on-off.c
index 6f264313408d5b90441161232aa98ff7ac8ae1c8..6b3cb32133892603358d892eb3db20a231e4a40a 100644 (file)
--- a/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-on-off.c
+++ b/gcc/testsuite/gcc.target/s390/vector/long-double-vx-macro-on-off.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target target_attribute } */
-/* { dg-options "-march=z13" } */
+/* { dg-options "-march=z13 -mzarch" } */
 #if defined(__LONG_DOUBLE_VX__)
 #error
 #endif