sim: bfin: always do 16bit sign extension with the SEARCH insn

The Blackfin PRM does not cover this case, but the hardware is clear: even
if the search criteria is not met (and thus a new 16bit value is loaded up
into the accumulator), the accumulator undergoes 16bit sign extension.  So
simply reload the low signed 16bits in that case.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
index 900dc50cb5325af0a0e3ce84e4f6343f4c7cc4e6..0e37dddc148253666bafddc30236daec344c810b 100644 (file)
--- a/sim/bfin/ChangeLog
+++ b/sim/bfin/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-23  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false,
+       and set A0 to a0_lo when up_lo is false.
+
 2011-03-23  Robin Getz  <robin.getz@analog.com>
 
        * bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index c78fe1a5a5196683888882ff29c8c7325d541d83..85e281a9d1d36442b64826584b9817866eedde15 100644 (file)
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -5041,11 +5041,16 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
          SET_AREG (1, src_hi);
          SET_DREG (dst1, PREG (0));
        }
+      else
+       SET_AREG (1, a1_lo);
+
       if (up_lo)
        {
          SET_AREG (0, src_lo);
          SET_DREG (dst0, PREG (0));
        }
+      else
+       SET_AREG (0, a0_lo);
     }
   else
     illegal_instruction (cpu);