]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/gpusvm: Add timeslicing support to GPU SVM
authorMatthew Brost <matthew.brost@intel.com>
Mon, 12 May 2025 13:54:57 +0000 (06:54 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Wed, 14 May 2025 16:03:29 +0000 (09:03 -0700)
Add timeslicing support to GPU SVM which will guarantee the GPU a
minimum execution time on piece of physical memory before migration back
to CPU. Intended to implement strict migration policies which require
memory to be in a certain placement for correct execution.

Required for shared CPU and GPU atomics on certain devices.

Fixes: 99624bdff867 ("drm/gpusvm: Add support for GPU Shared Virtual Memory")
Cc: stable@vger.kernel.org
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://lore.kernel.org/r/20250512135500.1405019-4-matthew.brost@intel.com
(cherry picked from commit 8dc1812b5b3a42311d28eb385eed88e2053ad3cb)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/drm_gpusvm.c
include/drm/drm_gpusvm.h

index 41f6616bcf76fa99fa85198d8e2deb51fcd1a087..4b2f32889f00f86674fa318ce9c2412bce438a3c 100644 (file)
@@ -1783,6 +1783,8 @@ int drm_gpusvm_migrate_to_devmem(struct drm_gpusvm *gpusvm,
                goto err_finalize;
 
        /* Upon success bind devmem allocation to range and zdd */
+       devmem_allocation->timeslice_expiration = get_jiffies_64() +
+               msecs_to_jiffies(ctx->timeslice_ms);
        zdd->devmem_allocation = devmem_allocation;     /* Owns ref */
 
 err_finalize:
@@ -2003,6 +2005,13 @@ static int __drm_gpusvm_migrate_to_ram(struct vm_area_struct *vas,
        void *buf;
        int i, err = 0;
 
+       if (page) {
+               zdd = page->zone_device_data;
+               if (time_before64(get_jiffies_64(),
+                                 zdd->devmem_allocation->timeslice_expiration))
+                       return 0;
+       }
+
        start = ALIGN_DOWN(fault_addr, size);
        end = ALIGN(fault_addr + 1, size);
 
index 653d48dbe1c11afee8e63ca4b88162fb58aa6f84..eaf704d3d05e8b7d946fcf7e09d4f3d18391c1f6 100644 (file)
@@ -89,6 +89,7 @@ struct drm_gpusvm_devmem_ops {
  * @ops: Pointer to the operations structure for GPU SVM device memory
  * @dpagemap: The struct drm_pagemap of the pages this allocation belongs to.
  * @size: Size of device memory allocation
+ * @timeslice_expiration: Timeslice expiration in jiffies
  */
 struct drm_gpusvm_devmem {
        struct device *dev;
@@ -97,6 +98,7 @@ struct drm_gpusvm_devmem {
        const struct drm_gpusvm_devmem_ops *ops;
        struct drm_pagemap *dpagemap;
        size_t size;
+       u64 timeslice_expiration;
 };
 
 /**
@@ -295,6 +297,8 @@ struct drm_gpusvm {
  * @check_pages_threshold: Check CPU pages for present if chunk is less than or
  *                         equal to threshold. If not present, reduce chunk
  *                         size.
+ * @timeslice_ms: The timeslice MS which in minimum time a piece of memory
+ *               remains with either exclusive GPU or CPU access.
  * @in_notifier: entering from a MMU notifier
  * @read_only: operating on read-only memory
  * @devmem_possible: possible to use device memory
@@ -304,6 +308,7 @@ struct drm_gpusvm {
  */
 struct drm_gpusvm_ctx {
        unsigned long check_pages_threshold;
+       unsigned long timeslice_ms;
        unsigned int in_notifier :1;
        unsigned int read_only :1;
        unsigned int devmem_possible :1;