#define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32)
#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
#else
-#define DECLARE_ARGS(val, low, high) unsigned long long val
+#define DECLARE_ARGS(val, low, high) u64 val
#define EAX_EDX_VAL(val, low, high) (val)
#define EAX_EDX_RET(val, low, high) "=A" (val)
#endif
* think of extending them - you will be slapped with a stinking trout or a frozen
* shark will reach you, wherever you are! You've been warned.
*/
-static __always_inline unsigned long long __rdmsr(unsigned int msr)
+static __always_inline u64 __rdmsr(unsigned int msr)
{
DECLARE_ARGS(val, low, high);
__wrmsr((msr), (u32)((u64)(val)), \
(u32)((u64)(val) >> 32))
-static inline unsigned long long native_read_msr(unsigned int msr)
+static inline u64 native_read_msr(unsigned int msr)
{
- unsigned long long val;
+ u64 val;
val = __rdmsr(msr);
return val;
}
-static inline unsigned long long native_read_msr_safe(unsigned int msr,
+static inline u64 native_read_msr_safe(unsigned int msr,
int *err)
{
DECLARE_ARGS(val, low, high);
* CPU can and will speculatively execute that RDTSC, though, so the
* results can be non-monotonic if compared on different CPUs.
*/
-static __always_inline unsigned long long rdtsc(void)
+static __always_inline u64 rdtsc(void)
{
DECLARE_ARGS(val, low, high);
* be impossible to observe non-monotonic rdtsc_unordered() behavior
* across multiple CPUs as long as the TSC is synced.
*/
-static __always_inline unsigned long long rdtsc_ordered(void)
+static __always_inline u64 rdtsc_ordered(void)
{
DECLARE_ARGS(val, low, high);
return EAX_EDX_VAL(val, low, high);
}
-static inline unsigned long long native_read_pmc(int counter)
+static inline u64 native_read_pmc(int counter)
{
DECLARE_ARGS(val, low, high);
__err; \
})
-static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p)
+static inline int rdmsrl_safe(unsigned int msr, u64 *p)
{
int err;